From 4e357d410cd5c25f33e470aa29301835d845a96c Mon Sep 17 00:00:00 2001 From: Joshua DeWeese Date: Fri, 18 Oct 2024 15:45:20 -0400 Subject: [PATCH 1/2] cpu/stm32/periph/timer: prevnt spurious IRQs This patch hardens the STM32 timer driver against some possible causes of spurious IRQs. --- cpu/stm32/periph/timer.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/cpu/stm32/periph/timer.c b/cpu/stm32/periph/timer.c index edf80488c4..fb94897eed 100644 --- a/cpu/stm32/periph/timer.c +++ b/cpu/stm32/periph/timer.c @@ -195,11 +195,13 @@ int timer_set(tim_t tim, int channel, unsigned int timeout) } #endif - /* clear spurious IRQs */ - dev(tim)->SR &= ~(TIM_SR_CC1IF << channel); - TIM_CHAN(tim, channel) = value; + /* clear spurious IRQs + * note: This might also clear the IRQ just set, but that is handled below + * anyway. */ + dev(tim)->SR &= ~(TIM_SR_CC1IF << channel); + /* enable IRQ */ dev(tim)->DIER |= (TIM_DIER_CC1IE << channel); @@ -264,7 +266,13 @@ int timer_clear(tim_t tim, int channel) } unsigned irqstate = irq_disable(); + + /* disable IRQ */ dev(tim)->DIER &= ~(TIM_DIER_CC1IE << channel); + + /* clear spurious IRQs */ + dev(tim)->SR &= ~(TIM_SR_CC1IF << channel); + irq_restore(irqstate); #ifdef MODULE_PERIPH_TIMER_PERIODIC From f24fc691186e9980f5bd8f2cec2293625b1272e6 Mon Sep 17 00:00:00 2001 From: Joshua DeWeese Date: Tue, 19 Nov 2024 21:50:23 -0500 Subject: [PATCH 2/2] cpu/stm32/periph/timer: fix whitespace style --- cpu/stm32/periph/timer.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/cpu/stm32/periph/timer.c b/cpu/stm32/periph/timer.c index fb94897eed..d407421e99 100644 --- a/cpu/stm32/periph/timer.c +++ b/cpu/stm32/periph/timer.c @@ -50,7 +50,6 @@ static unsigned channel_numof(tim_t tim) return TIMER_CHANNEL_NUMOF; } - #ifdef MODULE_PERIPH_TIMER_PERIODIC /** @@ -238,7 +237,7 @@ int timer_set_periodic(tim_t tim, int channel, unsigned int value, uint8_t flags dev(tim)->CNT = 0; /* wait for the interrupt & clear it */ - while(dev(tim)->SR == 0) {} + while (dev(tim)->SR == 0) {} dev(tim)->SR = 0; }