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Merge pull request #18000 from fjmolinas/pr_uwb_dw1000_fix_group_delay

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pkg/uwb-dw1000: fix default group delay, use OTP values when possible
This commit is contained in:
Francisco 2022-04-26 08:18:52 +02:00 committed by GitHub
commit 1850f9790c
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GPG Key ID: 4AEE18F83AFDEB23
11 changed files with 167 additions and 112 deletions
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4
pkg/uwb-core/Makefile.include
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@ -20,7 +20,7 @@ PSEUDOMODULES += uwb-core_rng_trx_info
DIRS += $(RIOTPKG)/uwb-core/contrib \
#
ifneq (,$(filter uwb-core_uwb_rng_trx_info,$(USEMODULE)))
ifneq (,$(filter uwb-core_rng_trx_info,$(USEMODULE)))
# Enable RX diagnostics
CFLAGS += -DDW1000_RX_DIAGNOSTIC=1
CFLAGS += -DCONFIG_DW1000_RX_DIAGNOSTIC=1
endif

2
pkg/uwb-core/include/dpl_syscfg/syscfg_twr_ds.h
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@ -29,7 +29,7 @@ extern "C" {
* @brief Enable toplevel ranging services
*/
#ifndef MYNEWT_VAL_TWR_DS_ENABLED
#define MYNEWT_VAL_TWR_DS_ENABLED (IS_ACTIVE(MODULE_UWB_CORE_TWR_DS))
#define MYNEWT_VAL_TWR_DS_ENABLED (IS_USED(MODULE_UWB_CORE_TWR_DS))
#endif
/**

2
pkg/uwb-core/include/dpl_syscfg/syscfg_twr_ds_ext.h
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@ -29,7 +29,7 @@ extern "C" {
* @brief Enable double sided extended two way ranging
*/
#ifndef MYNEWT_VAL_TWR_DS_EXT_ENABLED
#define MYNEWT_VAL_TWR_DS_EXT_ENABLED IS_ACTIVE(MODULE_UWB_CORE_TWR_DS_EXT)
#define MYNEWT_VAL_TWR_DS_EXT_ENABLED IS_USED(MODULE_UWB_CORE_TWR_DS_EXT)
#endif
/**

2
pkg/uwb-core/include/dpl_syscfg/syscfg_twr_ss.h
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@ -29,7 +29,7 @@ extern "C" {
* @brief Enable ranging services
*/
#ifndef MYNEWT_VAL_TWR_SS_ENABLED
#define MYNEWT_VAL_TWR_SS_ENABLED (IS_ACTIVE(MODULE_UWB_CORE_TWR_SS))
#define MYNEWT_VAL_TWR_SS_ENABLED (IS_USED(MODULE_UWB_CORE_TWR_SS))
#endif
/**

2
pkg/uwb-core/include/dpl_syscfg/syscfg_twr_ss_ack.h
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@ -29,7 +29,7 @@ extern "C" {
* @brief Enable toplevel ranging services
*/
#ifndef MYNEWT_VAL_TWR_SS_ACK_ENABLED
#define MYNEWT_VAL_TWR_SS_ACK_ENABLED (IS_ACTIVE(MODULE_UWB_CORE_TWR_SS_ACK))
#define MYNEWT_VAL_TWR_SS_ACK_ENABLED (IS_USED(MODULE_UWB_CORE_TWR_SS_ACK))
#endif
/**

2
pkg/uwb-core/include/dpl_syscfg/syscfg_twr_ss_ext.h
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@ -29,7 +29,7 @@ extern "C" {
* @brief Enable Single Sided extended ranging services
*/
#ifndef MYNEWT_VAL_TWR_SS_EXT_ENABLED
#define MYNEWT_VAL_TWR_SS_EXT_ENABLED (IS_ACTIVE(MODULE_UWB_CORE_TWR_SS_EXT))
#define MYNEWT_VAL_TWR_SS_EXT_ENABLED (IS_USED(MODULE_UWB_CORE_TWR_SS_EXT))
#endif
/**

2
pkg/uwb-core/include/dpl_syscfg/syscfg_uwb_rng.h
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@ -29,7 +29,7 @@ extern "C" {
* @brief uwb-core uwb_rng module is enabled
*/
#ifndef MYNEWT_VAL_UWB_RNG_ENABLED
#define MYNEWT_VAL_UWB_RNG_ENABLED ((IS_ACTIVE(MODULE_UWB_CORE_RNG)))
#define MYNEWT_VAL_UWB_RNG_ENABLED ((IS_USED(MODULE_UWB_CORE_RNG)))
#endif
/**

BIN
pkg/uwb-dw1000/0006-hw-drivers-dw1000_otp-fix-function-signature.patch Normal file
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122
pkg/uwb-dw1000/hal/uwb_dw1000.c
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@ -20,6 +20,7 @@
#include "dpl/dpl.h"
#include "dw1000/dw1000_phy.h"
#include "dw1000/dw1000_hal.h"
#include "dw1000/dw1000_otp.h"
#include "uwb_dw1000.h"
#include "uwb_dw1000_config.h"
@ -38,73 +39,79 @@
#define DW1000_THREAD_PRIORITY MYNEWT_VAL_UWB_DEV_TASK_PRIO
#endif
#define OTP_CH1_TX_POWER_PRF_16_ADDRESS (0x0010)
#define OTP_CH5_PG_DELAY_ADDRESS (0x001E)
#define OTP_CH5_PG_DELAY_MASK (0x00FF00ff)
#define OTP_CH5_PG_DELAY_SHIFT (16)
/* Link list head */
static struct _dw1000_dev_instance_t * dw1000_instance_head;
static struct _dw1000_dev_instance_t *dw1000_instance_head;
/* Default instance configuration */
static const dw1000_dev_instance_t dw1000_instance_config_default = {
.uwb_dev = {
.idx = 0,
.role = DW1000_ROLE_DEFAULT,
.role = CONFIG_DW1000_ROLE_DEFAULT,
.task_prio = DW1000_THREAD_PRIORITY,
.status = {0},
.rx_ant_separation = DW1000_RX_ANTSEP_DEFAULT,
.status = { 0 },
.rx_ant_separation = CONFIG_DW1000_RX_ANTSEP_DEFAULT,
.attrib = {
.nsfd = DW1000_NSFD_DEFAULT,
.nsync = DW1000_NSYNC_DEFAULT,
.nphr = DW1000_NPHR_DEFAULT ,
.nsfd = CONFIG_DW1000_NSFD_DEFAULT,
.nsync = CONFIG_DW1000_NSYNC_DEFAULT,
.nphr = CONFIG_DW1000_NPHR_DEFAULT,
},
.config = {
.channel = DW1000_CHANNEL_DEFAULT,
.prf = DW1000_PRF_DEFAULT,
.dataRate = DW1000_DATARATE_DEFAULT,
.channel = CONFIG_DW1000_CHANNEL_DEFAULT,
.prf = CONFIG_DW1000_PRF_DEFAULT,
.dataRate = CONFIG_DW1000_DATARATE_DEFAULT,
.rx = {
.pacLength = DW1000_PACLEN_DEFAULT,
.preambleCodeIndex = DW1000_RX_PREAM_CIDX_DEFAULT,
.sfdType = DW1000_RX_SFD_TYPE_DEFAULT,
.phrMode = DW1000_RX_PHR_MODE_DEFAULT,
.sfdTimeout = DW1000_RX_SFD_TO_DEFAULT,
.timeToRxStable = DW1000_RX_STABLE_TIME_US ,
.frameFilter = DW1000_FRAME_FILTER_DEFAULT,
.xtalTrim = DW1000_XTAL_TRIM_DEFAULT,
.pacLength = CONFIG_DW1000_PACLEN_DEFAULT,
.preambleCodeIndex = CONFIG_DW1000_RX_PREAM_CIDX_DEFAULT,
.sfdType = CONFIG_DW1000_RX_SFD_TYPE_DEFAULT,
.phrMode = CONFIG_DW1000_RX_PHR_MODE_DEFAULT,
.sfdTimeout = CONFIG_DW1000_RX_SFD_TO_DEFAULT,
.timeToRxStable = CONFIG_DW1000_RX_STABLE_TIME_US,
.frameFilter = CONFIG_DW1000_FRAME_FILTER_DEFAULT,
.xtalTrim = CONFIG_DW1000_XTAL_TRIM_DEFAULT,
},
.tx ={
.preambleCodeIndex = DW1000_TX_PREAM_CIDX_DEAULT,
.preambleLength = DW1000_TX_PREAM_LEN_DEFAULT,
.tx = {
.preambleCodeIndex = CONFIG_DW1000_TX_PREAM_CIDX_DEAULT,
.preambleLength = CONFIG_DW1000_TX_PREAM_LEN_DEFAULT,
},
.txrf={
.PGdly = DW1000_CHANNEL_DEFAULT,
.txrf = {
.PGdly = CONFIG_DW1000_TX_PGDELAY_DEFAULT,
.BOOSTNORM = dw1000_power_value(DW1000_txrf_config_9db, 2.5),
.BOOSTP500 = dw1000_power_value(DW1000_txrf_config_9db, 2.5),
.BOOSTP250 = dw1000_power_value(DW1000_txrf_config_9db, 2.5),
.BOOSTP125 = dw1000_power_value(DW1000_txrf_config_9db, 2.5)
},
.trxoff_enable = DW1000_TRXOFF_ENABLE,
.rxdiag_enable = DW1000_RX_DIAGNOSTIC,
.trxoff_enable = CONFIG_DW1000_TRXOFF_ENABLE,
.rxdiag_enable = CONFIG_DW1000_RX_DIAGNOSTIC,
.dblbuffon_enabled = DW1000_DOUBLE_BUFFER_ENABLE,
.LDE_enable = DW1000_LDE_ENABLE,
.LDO_enable = DW1000_LDO_ENABLE,
.sleep_enable = DW1000_SLEEP_ENABLE,
.wakeup_rx_enable = DW1000_WAKEUP_RX_ENABLE,
.rxauto_enable = DW1000_RX_AUTO_ENABLE,
.cir_enable = 0, /**< Default behavior for CIR interface */
.cir_pdoa_slave = 0, /**< First instance should not act as pdoa slave */
.blocking_spi_transfers = 1, /**< Nonblocking spi transfers are not supported */
.LDE_enable = CONFIG_DW1000_LDE_ENABLE,
.LDO_enable = CONFIG_DW1000_LDO_ENABLE,
.sleep_enable = CONFIG_DW1000_SLEEP_ENABLE,
.wakeup_rx_enable = CONFIG_DW1000_WAKEUP_RX_ENABLE,
.rxauto_enable = CONFIG_DW1000_RX_AUTO_ENABLE,
.cir_enable = 0, /**< Default behavior for CIR interface */
.cir_pdoa_slave = 0, /**< First instance should not act as pdoa slave */
.blocking_spi_transfers = 1, /**< Nonblocking spi transfers are not supported */
},
}
};
void _uwb_dw1000_set_idx(dw1000_dev_instance_t* dev)
void _uwb_dw1000_set_idx(dw1000_dev_instance_t *dev)
{
int count = 0;
dw1000_dev_instance_t *elt = NULL;
LL_COUNT(dw1000_instance_head, elt, count);
dev->uwb_dev.idx = count++;
/* prepend to list */
LL_PREPEND(dw1000_instance_head, dev);
}
void uwb_dw1000_setup(dw1000_dev_instance_t* dev, dw1000_params_t* params)
void uwb_dw1000_setup(dw1000_dev_instance_t *dev, dw1000_params_t *params)
{
/* set semaphore */
dpl_sem_init(params->spi_sem, 0x1);
@ -115,16 +122,45 @@ void uwb_dw1000_setup(dw1000_dev_instance_t* dev, dw1000_params_t* params)
_uwb_dw1000_set_idx(dev);
/* this will set the configuration and init uwb_dev which ATM only
allocates an RX and TX buffer if none is yet available */
dw1000_dev_init((struct os_dev *) dev, (void *) params);
dw1000_dev_init((struct os_dev *)dev, (void *)params);
}
void uwb_dw1000_config_and_start(dw1000_dev_instance_t* dev)
void uwb_dw1000_config_and_start(dw1000_dev_instance_t *dev)
{
dw1000_dev_config(dev);
uwb_dw1000_update_config_from_otp(dev);
}
void uwb_dw1000_set_buffs(dw1000_dev_instance_t* dev, uint8_t* tx_buf,
uint8_t* rx_buf)
void uwb_dw1000_update_config_from_otp(dw1000_dev_instance_t *dev)
{
/* every channel has to registers, first for PRF16, second PRF64 */
uint16_t address = OTP_CH1_TX_POWER_PRF_16_ADDRESS + (2 * (dev->uwb_dev.config.channel - 1)) +
(dev->uwb_dev.config.prf - DWT_PRF_16M);
/* channel 6 is missing, so channel 7 is actually to addresses earlier */
if (dev->uwb_dev.config.channel == 7) {
address -= 2;
}
uint32_t tx_power = _dw1000_otp_read(dev, address);
LOG_DEBUG("uwb-dw1000: OTP addr=(%" PRIx16 "),val=(%" PRIx32 ")\n", address, tx_power);
if (tx_power != 0) {
dev->uwb_dev.config.txrf.power = tx_power;
}
if (dev->uwb_dev.config.channel == 5) {
uint8_t pg_delay =
((_dw1000_otp_read(dev,
OTP_CH5_PG_DELAY_ADDRESS) & OTP_CH5_PG_DELAY_MASK) >>
OTP_CH5_PG_DELAY_SHIFT);
LOG_DEBUG("uwb-dw1000: pg-delay addr=(%" PRIx16 "),val=(%" PRIx16 ")\n",
OTP_CH5_PG_DELAY_ADDRESS, pg_delay);
dev->uwb_dev.config.txrf.PGdly = pg_delay;
}
}
void uwb_dw1000_set_buffs(dw1000_dev_instance_t *dev, uint8_t *tx_buf,
uint8_t *rx_buf)
{
dev->uwb_dev.rxbuf = rx_buf;
dev->uwb_dev.txbuf = tx_buf;
@ -135,19 +171,19 @@ void uwb_dw1000_init(void)
dw1000_instance_head = NULL;
}
struct uwb_dev* uwb_dev_idx_lookup(int idx)
struct uwb_dev *uwb_dev_idx_lookup(int idx)
{
dw1000_dev_instance_t *current = dw1000_instance_head;
while (current) {
if (current->uwb_dev.idx == idx) {
LOG_DEBUG("uwb_dev: found dev of idx %d\n", idx);
LOG_DEBUG("uwb-dw1000: found dev of idx %d\n", idx);
break;
}
current = current->next;
}
return (struct uwb_dev*) &current->uwb_dev;
return (struct uwb_dev *)&current->uwb_dev;
}
/**
@ -157,7 +193,7 @@ struct uwb_dev* uwb_dev_idx_lookup(int idx)
* @return dw1000_dev_instance_t
*/
struct _dw1000_dev_instance_t * hal_dw1000_inst(uint8_t idx)
struct _dw1000_dev_instance_t *hal_dw1000_inst(uint8_t idx)
{
dw1000_dev_instance_t *current = dw1000_instance_head;

8
pkg/uwb-dw1000/include/uwb_dw1000.h
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@ -80,6 +80,14 @@ void uwb_dw1000_setup(dw1000_dev_instance_t* dev, dw1000_params_t* params);
*/
void uwb_dw1000_config_and_start(dw1000_dev_instance_t* dev);
/**
* @brief Updates tx_power config from OTP is any
*
*
* @param[out] dev dw1000 device descriptor
*/
void uwb_dw1000_update_config_from_otp(dw1000_dev_instance_t* dev);
#ifdef __cplusplus
}
#endif

133
pkg/uwb-dw1000/include/uwb_dw1000_config.h
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@ -35,59 +35,58 @@ extern "C" {
* - Anchor "0x04"
* - Panmaster "0x07"
*/
#ifndef DW1000_ROLE_DEFAULT
#define DW1000_ROLE_DEFAULT 0x0
#ifndef CONFIG_DW1000_ROLE_DEFAULT
#define CONFIG_DW1000_ROLE_DEFAULT 0x0
#endif
/**
* @brief Default Number of symbols in start of frame delimiter
*/
#ifndef DW1000_NSFD_DEFAULT
#define DW1000_NSFD_DEFAULT 8
#ifndef CONFIG_DW1000_NSFD_DEFAULT
#define CONFIG_DW1000_NSFD_DEFAULT 8
#endif
/**
* @brief Default Number of symbols in preamble sequence
*/
#ifndef DW1000_NSYNC_DEFAULT
#define DW1000_NSYNC_DEFAULT 128
#ifndef CONFIG_DW1000_NSYNC_DEFAULT
#define CONFIG_DW1000_NSYNC_DEFAULT 128
#endif
/**
* @brief Default Number of symbols in phy header
*/
#ifndef DW1000_NPHR_DEFAULT
#define DW1000_NPHR_DEFAULT 21
#ifndef CONFIG_DW1000_NPHR_DEFAULT
#define CONFIG_DW1000_NPHR_DEFAULT 21
#endif
/**
* @brief Default channel
*/
#ifndef DW1000_CHANNEL_DEFAULT
#define DW1000_CHANNEL_DEFAULT 5
#if DW1000_CHANNEL_DEFAULT > 7 || DW1000_CHANNEL_DEFAULT < 1
#error "DW1000_CHANNEL_DEFAULT must be 1..7"
#ifndef CONFIG_DW1000_CHANNEL_DEFAULT
#define CONFIG_DW1000_CHANNEL_DEFAULT 5
#if CONFIG_DW1000_CHANNEL_DEFAULT > 7 || CONFIG_DW1000_CHANNEL_DEFAULT < 1 || \
CONFIG_DW1000_CHANNEL_DEFAULT == 6
#error "CONFIG_DW1000_CHANNEL_DEFAULT must be 1..7, 6 excluded"
#endif
#endif
/**
* @brief Default Pulse generator delay
*/
#ifndef DW1000_TX_PGDELAY_DEFAULT
#if DW1000_CHANNEL_DEFAULT == 1
#define DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH1
#elif DW1000_CHANNEL_DEFAULT == 2
#define DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH2
#elif DW1000_CHANNEL_DEFAULT == 3
#define DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH3
#elif DW1000_CHANNEL_DEFAULT == 4
#define DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH4
#elif DW1000_CHANNEL_DEFAULT == 5
#define DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH5
#elif DW1000_CHANNEL_DEFAULT == 6
#define DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH7
#elif DW1000_CHANNEL_DEFAULT == 7
#define DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH7
#ifndef CONFIG_DW1000_TX_PGDELAY_DEFAULT
#if CONFIG_DW1000_CHANNEL_DEFAULT == 1
#define CONFIG_DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH1
#elif CONFIG_DW1000_CHANNEL_DEFAULT == 2
#define CONFIG_DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH2
#elif CONFIG_DW1000_CHANNEL_DEFAULT == 3
#define CONFIG_DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH3
#elif CONFIG_DW1000_CHANNEL_DEFAULT == 4
#define CONFIG_DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH4
#elif CONFIG_DW1000_CHANNEL_DEFAULT == 5
#define CONFIG_DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH5
#elif CONFIG_DW1000_CHANNEL_DEFAULT == 7
#define CONFIG_DW1000_TX_PGDELAY_DEFAULT TC_PGDELAY_CH7
#endif
#endif
@ -97,8 +96,8 @@ extern "C" {
* - DWT_PRF_16M
* - DWT_PRF_64M
*/
#ifndef DW1000_PRF_DEFAULT
#define DW1000_PRF_DEFAULT DWT_PRF_64M
#ifndef CONFIG_DW1000_PRF_DEFAULT
#define CONFIG_DW1000_PRF_DEFAULT DWT_PRF_64M
#endif
/**
@ -108,8 +107,8 @@ extern "C" {
* - DWT_BR_850K
* - DWT_BR_6M8
*/
#ifndef DW1000_DATARATE_DEFAULT
#define DW1000_DATARATE_DEFAULT DWT_BR_6M8
#ifndef CONFIG_DW1000_DATARATE_DEFAULT
#define CONFIG_DW1000_DATARATE_DEFAULT DWT_BR_6M8
#endif
/**
@ -120,15 +119,15 @@ extern "C" {
* - 32
* - 64
*/
#ifndef DW1000_PACLEN_DEFAULT
#define DW1000_PACLEN_DEFAULT DWT_PAC8
#ifndef CONFIG_DW1000_PACLEN_DEFAULT
#define CONFIG_DW1000_PACLEN_DEFAULT DWT_PAC8
#endif
/**
* @brief Default UWB RX Preamble Code Index
*/
#ifndef DW1000_RX_PREAM_CIDX_DEFAULT
#define DW1000_RX_PREAM_CIDX_DEFAULT 9
#ifndef CONFIG_DW1000_RX_PREAM_CIDX_DEFAULT
#define CONFIG_DW1000_RX_PREAM_CIDX_DEFAULT 9
#endif
/**
@ -137,16 +136,16 @@ extern "C" {
* - true: use non standard SFD for better performance
* - false: use standard SFD
*/
#ifndef DW1000_RX_SFD_TYPE_DEFAULT
#define DW1000_RX_SFD_TYPE_DEFAULT true
#ifndef CONFIG_DW1000_RX_SFD_TYPE_DEFAULT
#define CONFIG_DW1000_RX_SFD_TYPE_DEFAULT true
#endif
/**
* @brief Default UWB SFD Timeout (-1=auto, timeout in symbols)
*
*/
#ifndef DW1000_RX_SFD_TO_DEFAULT
#define DW1000_RX_SFD_TO_DEFAULT (128 + 1 + 8 - 8) /* (preamble length + 1 + SFD length - PAC size) */
#ifndef CONFIG_DW1000_RX_SFD_TO_DEFAULT
#define CONFIG_DW1000_RX_SFD_TO_DEFAULT (128 + 1 + 8 - 8) /* (preamble length + 1 + SFD length - PAC size) */
#endif
/**
@ -155,22 +154,22 @@ extern "C" {
* - 0x0 - standard DWT_PHRMODE_STD
* - 0x3 - extended frames DWT_PHRMODE_EXT
*/
#ifndef DW1000_RX_PHR_MODE_DEFAULT
#define DW1000_RX_PHR_MODE_DEFAULT DWT_PHRMODE_EXT
#ifndef CONFIG_DW1000_RX_PHR_MODE_DEFAULT
#define CONFIG_DW1000_RX_PHR_MODE_DEFAULT DWT_PHRMODE_EXT
#endif
/**
* @brief Enable RX Frame Quality diagnositics (rssi, fppl, etc.)
*/
#ifndef DW1000_RX_DIAGNOSTIC
#define DW1000_RX_DIAGNOSTIC 0
#ifndef CONFIG_DW1000_RX_DIAGNOSTIC
#define CONFIG_DW1000_RX_DIAGNOSTIC 0
#endif
/**
* @brief Default UWB RX Antenna separation distance in m
*/
#ifndef DW1000_TX_PREAM_CIDX_DEAULT
#define DW1000_TX_PREAM_CIDX_DEAULT 9
#ifndef CONFIG_DW1000_TX_PREAM_CIDX_DEAULT
#define CONFIG_DW1000_TX_PREAM_CIDX_DEAULT 9
#endif
/**
@ -187,43 +186,45 @@ extern "C" {
* - DWT_PLEN_32 : When setting length 32 symbols this is 0x0, which is programmed to byte 2 of the TX_FCTRL register
* - DWT_PLEN_72 : Non-standard length 72
*/
#ifndef DW1000_TX_PREAM_LEN_DEFAULT
#define DW1000_TX_PREAM_LEN_DEFAULT DWT_PLEN_128
#ifndef CONFIG_DW1000_TX_PREAM_LEN_DEFAULT
#define CONFIG_DW1000_TX_PREAM_LEN_DEFAULT DWT_PLEN_128
#endif
/**
* @brief Default UWB RX Antenna separation distance in m
*/
#ifndef DW1000_RX_ANTSEP_DEFAULT
#define DW1000_RX_ANTSEP_DEFAULT 0.0205
#ifndef CONFIG_DW1000_RX_ANTSEP_DEFAULT
#define CONFIG_DW1000_RX_ANTSEP_DEFAULT 0.0205
#endif
/**
* @brief Default MAC FrameFilter (0x00ff = frame filtering enabled, all frames
* matching PANID and destination address accepted)
*/
#ifndef DW1000_FRAME_FILTER_DEFAULT
#define DW1000_FRAME_FILTER_DEFAULT 0x00ff
#ifndef CONFIG_DW1000_FRAME_FILTER_DEFAULT
#define CONFIG_DW1000_FRAME_FILTER_DEFAULT 0x00ff
#endif
/**
* @brief Default MAC FrameFilter Crystal Trim value, 0xff == not set
*/
#ifndef DW1000_XTAL_TRIM_DEFAULT
#define DW1000_XTAL_TRIM_DEFAULT 0x10
#ifndef CONFIG_DW1000_XTAL_TRIM_DEFAULT
#define CONFIG_DW1000_XTAL_TRIM_DEFAULT 0x10
#endif
/**
* @brief Time until the Receiver is stable, (in us)
*/
#ifndef DW1000_RX_STABLE_TIME_US
#define DW1000_RX_STABLE_TIME_US 6
#ifndef CONFIG_DW1000_RX_STABLE_TIME_US
#define CONFIG_DW1000_RX_STABLE_TIME_US 6
#endif
/**
* @brief Enables forced TRXOFF in start_tx and start_tx interface
*/
#define DW1000_TRXOFF_ENABLE 1
#ifndef CONFIG_DW1000_TRXOFF_ENABLE
#define CONFIG_DW1000_TRXOFF_ENABLE 1
#endif
/**
* @brief Enables double buffer
@ -233,27 +234,37 @@ extern "C" {
/**
* @brief Load LDE microcode on wake up
*/
#define DW1000_LDE_ENABLE true
#ifndef CONFIG_DW1000_LDE_ENABLE
#define CONFIG_DW1000_LDE_ENABLE true
#endif
/**
* @brief Load the LDO tune value on wake up
*/
#define DW1000_LDO_ENABLE false
#ifndef CONFIG_DW1000_LDO_ENABLE
#define CONFIG_DW1000_LDO_ENABLE false
#endif
/**
* @brief Enable sleep
*/
#define DW1000_SLEEP_ENABLE true
#ifndef CONFIG_DW1000_SLEEP_ENABLE
#define CONFIG_DW1000_SLEEP_ENABLE true
#endif
/**
* @brief Wakeup to Rx state
*/
#define DW1000_WAKEUP_RX_ENABLE true
#ifndef CONFIG_DW1000_WAKEUP_RX_ENABLE
#define CONFIG_DW1000_WAKEUP_RX_ENABLE true
#endif
/**
* @brief On error re-enable
*/
#define DW1000_RX_AUTO_ENABLE true
#ifndef CONFIG_DW1000_RX_AUTO_ENABLE
#define CONFIG_DW1000_RX_AUTO_ENABLE true
#endif
#ifdef __cplusplus
}