diff --git a/cpu/stm32f0/vectors.c b/cpu/stm32f0/vectors.c
index 9768f721ef..5c22267d47 100644
--- a/cpu/stm32f0/vectors.c
+++ b/cpu/stm32f0/vectors.c
@@ -109,6 +109,8 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     [12] = isr_adc1,                 /* [12] ADC1 Interrupt */
     [13] = isr_tim1_brk_up_trg_com,  /* [13] TIM1 Break, Update, Trigger and Commutation Interrupt */
     [15] = isr_tim2,                 /* [15] TIM2 global Interrupt */
+    [23] = isr_i2c1,                 /* [23] I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */
+    [27] = isr_usart1,               /* [27] USART1 global Interrupt & EXTI Line25 Interrupt (USART1 wakeup) */
 #elif defined(CPU_MODEL_STM32F042K6)
     [ 1] = isr_pvd_vddio2,           /* [ 1] PVD & VDDIO2 Interrupts through EXTI Lines 16 and 31 */
     [ 4] = isr_rcc_crs,              /* [ 4] RCC & CRS Global Interrupts */
@@ -122,7 +124,9 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     [12] = isr_adc1,                 /* [12] ADC1 Interrupt */
     [13] = isr_tim1_brk_up_trg_com,  /* [13] TIM1 Break, Update, Trigger and Commutation Interrupts */
     [15] = isr_tim2,                 /* [15] TIM2 global Interrupt */
+    [23] = isr_i2c1,                 /* [23] I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */
     [26] = isr_spi2,                 /* [26] SPI2 global Interrupt */
+    [27] = isr_usart1,               /* [27] USART1 global Interrupt & EXTI Line25 Interrupt (USART1 wakeup) */
     [28] = isr_usart2,               /* [28] USART2 global Interrupt */
     [30] = isr_cec_can,              /* [30] CEC and CAN global Interrupts & EXTI Line27 Interrupt */
     [31] = isr_usb,                  /* [31] USB global Interrupts & EXTI Line18 Interrupt */
@@ -141,8 +145,10 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     [15] = isr_tim2,                 /* [15] TIM2 global Interrupt */
     [17] = isr_tim6_dac,             /* [17] TIM6 global and DAC channel underrun error Interrupts */
     [20] = isr_tim15,                /* [20] TIM15 global Interrupt */
+    [23] = isr_i2c1,                 /* [23] I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */
     [24] = isr_i2c2,                 /* [24] I2C2 Event Interrupt */
     [26] = isr_spi2,                 /* [26] SPI2 global Interrupt */
+    [27] = isr_usart1,               /* [27] USART1 global Interrupt & EXTI Line25 Interrupt (USART1 wakeup) */
     [28] = isr_usart2,               /* [28] USART2 global Interrupt */
     [30] = isr_cec_can,              /* [30] CEC and CAN global Interrupts & EXTI Line27 Interrupt */
 #elif defined(CPU_MODEL_STM32F070RB)
@@ -158,6 +164,7 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     [17] = isr_tim6,                 /* [17] TIM6 global Interrupt */
     [18] = isr_tim7,                 /* [18] TIM7 global Interrupt */
     [20] = isr_tim15,                /* [20] TIM15 global Interrupt */
+    [23] = isr_i2c1,                 /* [23] I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */
     [24] = isr_i2c2,                 /* [24] I2C2 Event Interrupt */
     [26] = isr_spi2,                 /* [26] SPI2 global Interrupt */
     [27] = isr_usart1,               /* [27] USART1 global Interrupt */
@@ -180,8 +187,11 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     [17] = isr_tim6_dac,             /* [17] TIM6 global and DAC channel underrun error Interrupt */
     [18] = isr_tim7,                 /* [18] TIM7 global Interrupt */
     [20] = isr_tim15,                /* [20] TIM15 global Interrupt */
+    [23] = isr_i2c1,                 /* [23] I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */
     [24] = isr_i2c2,                 /* [24] I2C2 Event Interrupt */
     [26] = isr_spi2,                 /* [26] SPI2 global Interrupt */
+    [27] = isr_usart1,               /* [27] USART1 global Interrupt & EXTI Line25 Interrupt (USART1 wakeup) */
+    [28] = isr_usart2,               /* [28] USART2 global Interrupt & EXTI Line26 Interrupt (USART2 wakeup) */
     [29] = isr_usart3_4,             /* [29] USART3 and USART4 global Interrupt */
     [30] = isr_cec_can,              /* [30] CEC and CAN global Interrupts & EXTI Line27 Interrupt */
     [31] = isr_usb,                  /* [31] USB global Interrupt  & EXTI Line18 Interrupt */
@@ -195,13 +205,17 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     [ 9] = isr_dma1_ch1,             /* [ 9] DMA1 Channel 1 Interrupt */
     [10] = isr_dma1_ch2_3_dma2_ch1_2,/* [10] DMA1 Channel 2 and 3 & DMA2 Channel 1 and 2 Interrupts */
     [11] = isr_dma1_ch4_7_dma2_ch3_5,/* [11] DMA1 Channel 4 to 7 & DMA2 Channel 3 to 5 Interrupts */
+    [12] = isr_adc1_comp,            /* [12] ADC, COMP1 and COMP2 Interrupts (EXTI Lines 21 and 22) */
     [13] = isr_tim1_brk_up_trg_com,  /* [13] TIM1 Break, Update, Trigger and Commutation Interrupts */
     [15] = isr_tim2,                 /* [15] TIM2 global Interrupt */
     [17] = isr_tim6_dac,             /* [17] TIM6 global and DAC channel underrun error Interrupts */
     [18] = isr_tim7,                 /* [18] TIM7 global Interrupt */
     [20] = isr_tim15,                /* [20] TIM15 global Interrupt */
+    [23] = isr_i2c1,                 /* [23] I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */
     [24] = isr_i2c2,                 /* [24] I2C2 Event Interrupt */
     [26] = isr_spi2,                 /* [26] SPI2 global Interrupt */
+    [27] = isr_usart1,               /* [27] USART1 global Interrupt & EXTI Line25 Interrupt (USART1 wakeup) */
+    [28] = isr_usart2,               /* [28] USART2 global Interrupt & EXTI Line26 Interrupt (USART2 wakeup) */
     [29] = isr_usart3_8,             /* [29] USART3 to USART8 global Interrupts */
     [30] = isr_cec_can,              /* [30] CEC and CAN global Interrupts & EXTI Line27 Interrupt */
 #endif