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cpu/nrf51822: squash added support for nrf51822 cpu

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This commit is contained in:
epiktet 2014-07-30 14:59:14 +02:00
parent 8aea1c196e
commit 1154bd5a50
31 changed files with 10050 additions and 14 deletions
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7
cpu/nrf51822/Makefile Normal file
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# define the module that is build
MODULE = cpu
# add a list of subdirectories, that should also be build
DIRS = periph $(CORTEX_COMMON)
include $(RIOTBASE)/Makefile.base

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cpu/nrf51822/Makefile.include Normal file
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# this CPU implementation is using the new core/CPU interface
export CFLAGS += -DCOREIF_NG=1
# tell the build system that the CPU depends on the Cortex-M common files
export USEMODULE += cortex-m0_common
# define path to cortex-m common module, which is needed for this CPU
export CORTEX_COMMON = $(RIOTCPU)/cortex-m0_common/
# define the linker script to use for this CPU. The CPU_MODEL variable is defined in the
# board's Makefile.include. This enables multiple NRF51822 controllers with different memory to
# use the same code-base.
export LINKERSCRIPT = $(RIOTCPU)/$(CPU)/$(CPU_MODEL)_linkerscript.ld
#export the CPU model
MODEL = $(shell echo $(CPU_MODEL)|tr 'a-z' 'A-Z')
export CFLAGS += -DCPU_MODEL_$(MODEL)
# include CPU specific includes
export INCLUDES += -I$(RIOTCPU)/$(CPU)/include
# add the CPU specific system calls implementations for the linker
export UNDEF += $(BINDIR)cpu/syscalls.o
export UNDEF += $(BINDIR)cpu/startup.o
# export the peripheral drivers to be linked into the final binary
export USEMODULE += periph
# CPU depends on the cortex-m common module, so include it
include $(CORTEX_COMMON)Makefile.include

29
cpu/nrf51822/cpu.c Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file cpu.c
* @brief Implementation of the CPU initialization
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @}
*/
#include "cpu.h"
/**
* @brief Initialize the CPU, set IRQ priorities
*/
void cpu_init(void)
{
/* set pendSV interrupt to lowest possible priority */
NVIC_SetPriority(PendSV_IRQn, 0xff);
}

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cpu/nrf51822/hwtimer_arch.c Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file hwtimer_arch.c
* @brief Implementation of the kernels hwtimer interface
*
* The hardware timer implementation uses a direct mapping to the low-level UART driver.
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include "arch/hwtimer_arch.h"
#include "board.h"
#include "periph/timer.h"
#include "thread.h"
void irq_handler(int channel);
void (*timeout_handler)(int);
void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu)
{
timeout_handler = handler;
timer_init(HW_TIMER, 1, &irq_handler);
}
void hwtimer_arch_enable_interrupt(void)
{
timer_irq_enable(HW_TIMER);
}
void hwtimer_arch_disable_interrupt(void)
{
timer_irq_disable(HW_TIMER);
}
void hwtimer_arch_set(unsigned long offset, short timer)
{
timer_set(HW_TIMER, timer, offset);
}
void hwtimer_arch_set_absolute(unsigned long value, short timer)
{
timer_set_absolute(HW_TIMER, timer, value);
}
void hwtimer_arch_unset(short timer)
{
timer_clear(HW_TIMER, timer);
}
unsigned long hwtimer_arch_now(void)
{
return timer_read(HW_TIMER);
}
void irq_handler(int channel)
{
timeout_handler((short)(channel));
}

53
cpu/nrf51822/include/cpu-conf.h Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file cpu-conf.h
* @brief Implementation specific CPU configuration options
*
* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
*/
#ifndef __CPU_CONF_H
#define __CPU_CONF_H
#include "nrf51.h"
#include "nrf51_bitfields.h"
/**
* @name Kernel configuration
*
* TODO: measure and adjust for the cortex-m0
* @{
*/
#define KERNEL_CONF_STACKSIZE_PRINTF (1024)
#ifndef KERNEL_CONF_STACKSIZE_DEFAULT
#define KERNEL_CONF_STACKSIZE_DEFAULT (1024)
#endif
#define KERNEL_CONF_STACKSIZE_IDLE (256)
/** @} */
/**
* @name UART0 buffer size definition for compatibility reasons
*
* TODO: remove once the remodeling of the uart0 driver is done
* @{
*/
#ifndef UART0_BUFSIZE
#define UART0_BUFSIZE (128)
#endif
/** @} */
#endif /* __CPU_CONF_H */
/** @} */

34
cpu/nrf51822/include/hwtimer_cpu.h Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file hwtimer_cpu.h
* @brief CPU specific hwtimer configuration options
*
* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
*/
#ifndef __HWTIMER_CPU_H
#define __HWTIMER_CPU_H
/**
* @name Hardware timer configuration
* @{
*/
#define HWTIMER_MAXTIMERS 3 /**< the CPU implementation supports 3 HW timers */
#define HWTIMER_SPEED 1000000 /**< the HW timer runs with 1MHz */
#define HWTIMER_MAXTICKS (0xFFFFFFFF) /**< 32-bit timer */
/** @} */
#endif /* __HWTIMER_CPU_H */
/** @} */

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cpu/nrf51822/include/nrf51.h Normal file
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cpu/nrf51822/include/nrf51_bitfields.h Normal file
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31
cpu/nrf51822/io_arch.c Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file io_arch.c
* @brief Implementation of the kernel's architecture dependent IO interface
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include "arch/io_arch.h"
#include "periph/uart.h"
int io_arch_puts(char *data, int size)
{
int i = 0;
for (; i < size; i++) {
uart_write_blocking(UART_0, data[i]);
}
return i;
}

53
cpu/nrf51822/lpm_arch.c Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file lpm_arch.c
* @brief Implementation of the kernels power management interface
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include "arch/lpm_arch.h"
void lpm_arch_init(void)
{
/* TODO: needs to be implemented */
}
enum lpm_mode lpm_arch_set(enum lpm_mode target)
{
/* TODO: needs to be implemented */
return 0;
}
enum lpm_mode lpm_arch_get(void)
{
/* TODO: needs to be implemented */
return 0;
}
void lpm_arch_awake(void)
{
/* TODO: needs to be implemented */
}
void lpm_arch_begin_awake(void)
{
/* TODO: needs to be implemented */
}
void lpm_arch_end_awake(void)
{
/* TODO: needs to be implemented */
}

143
cpu/nrf51822/nrf51822qfaa_linkerscript.ld Normal file
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/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
/* Memory Spaces Definitions */
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x40000 /* 256K flash */
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x4000 /* 16K ram */
}
/* The stack size used by the application. NOTE: you need to adjust */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0xa00 ;
/* Section Definitions */
SECTIONS
{
.text :
{
. = ALIGN(4);
_sfixed = .;
KEEP(*(.vectors .vectors.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
/* Support C constructors, and C destructors in both user code
and the C library. This also provides support for C++ code. */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(0x4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
_efixed = .; /* End of text section */
} > rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > rom
PROVIDE_HIDDEN (__exidx_end = .);
. = ALIGN(4);
_etext = .;
.relocate : AT (_etext)
{
. = ALIGN(4);
_srelocate = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_erelocate = .;
} > ram
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = . ;
_szero = .;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
_ezero = .;
} > ram
/* stack section */
.stack (NOLOAD):
{
. = ALIGN(8);
_sstack = .;
. = . + STACK_SIZE;
. = ALIGN(8);
_estack = .;
} > ram
. = ALIGN(4);
_end = . ;
}

3
cpu/nrf51822/periph/Makefile Normal file
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MODULE = periph
include $(RIOTBASE)/Makefile.base

332
cpu/nrf51822/periph/gpio.c Normal file
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file gpio.c
* @brief Low-level GPIO driver implementation
*
* NOTE: this GPIO driver implementation supports due to hardware limitations
* only one pin configured as external interrupt source at a time!
*
* @author Christian Kühling <kuehling@zedat.fu-berlin.de>
* @author Timo Ziegler <timo.ziegler@fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include "cpu.h"
#include "sched.h"
#include "thread.h"
#include "periph/gpio.h"
#include "periph_conf.h"
typedef struct {
void (*cb)(void);
} gpio_state_t;
static gpio_state_t gpio_config;
/**
* @brief helper function to get the pin that corresponds to a GPIO device
*
* @param[in] dev the device the returned pin corresponds to
*
* @return the pin number of for the given device
* @return -1 if device unknown
*/
static inline int get_pin(gpio_t dev)
{
switch (dev) {
#if GPIO_0_EN
case GPIO_0:
return GPIO_0_PIN;
break;
#endif
#if GPIO_1_EN
case GPIO_1:
return GPIO_1_PIN;
break;
#endif
#if GPIO_2_EN
case GPIO_2:
return GPIO_2_PIN;
break;
#endif
#if GPIO_3_EN
case GPIO_3:
return GPIO_3_PIN;
break;
#endif
#if GPIO_4_EN
case GPIO_4:
return GPIO_4_PIN;
break;
#endif
#if GPIO_5_EN
case GPIO_5:
return GPIO_5_PIN;
break;
#endif
#if GPIO_6_EN
case GPIO_6:
return GPIO_6_PIN;
break;
#endif
#if GPIO_7_EN
case GPIO_7:
return GPIO_7_PIN;
break;
#endif
#if GPIO_8_EN
case GPIO_8:
return GPIO_8_PIN;
break;
#endif
#if GPIO_9_EN
case GPIO_9:
return GPIO_9_PIN;
break;
#endif
#if GPIO_10_EN
case GPIO_10:
return GPIO_10_PIN;
break;
#endif
#if GPIO_11_EN
case GPIO_11:
return GPIO_11_PIN;
break;
#endif
#if GPIO_12_EN
case GPIO_12:
return GPIO_12_PIN;
break;
#endif
#if GPIO_13_EN
case GPIO_13:
return GPIO_13_PIN;
break;
#endif
#if GPIO_14_EN
case GPIO_14:
return GPIO_14_PIN;
break;
#endif
#if GPIO_15_EN
case GPIO_15:
return GPIO_15_PIN;
break;
#endif
case GPIO_UNDEFINED:
default:
return -1;
}
}
int gpio_init_out(gpio_t dev, gpio_pp_t pullup)
{
int pin = get_pin(dev);
if (pin < 0) {
return pin;
}
/* set pin to output mode */
NRF_GPIO->DIRSET = (1 << pin);
/* set pin to standard configuration */
NRF_GPIO->PIN_CNF[pin] = 0;
/* set pull register configuration */
switch (pullup) {
case GPIO_NOPULL:
break;
case GPIO_PULLUP:
NRF_GPIO->PIN_CNF[dev] |= (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos);
break;
case GPIO_PULLDOWN:
NRF_GPIO->PIN_CNF[dev] |= (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos);
break;
}
return 0;
}
int gpio_init_in(gpio_t dev, gpio_pp_t pullup)
{
int pin = get_pin(dev);
if (pin < 0) {
return pin;
}
/* set pin to output mode */
NRF_GPIO->DIRCLR = (1 << pin);
/* set pin to standard configuration */
NRF_GPIO->PIN_CNF[pin] = 0;
/* set pull register configuration */
switch (pullup) {
case GPIO_NOPULL:
break;
case GPIO_PULLUP:
NRF_GPIO->PIN_CNF[dev] |= (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos);
break;
case GPIO_PULLDOWN:
NRF_GPIO->PIN_CNF[dev] |= (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos);
break;
}
return 0;
}
int gpio_init_int(gpio_t dev, gpio_pp_t pullup, gpio_flank_t flank, void (*cb)(void))
{
int res;
uint32_t pin;
/* configure pin as input */
res = gpio_init_in(dev, pullup);
if (res < 0) {
return res;
}
/* get pin */
pin = get_pin(dev); /* no need to check return value, init_in already did */
/* set interrupt priority and enable global GPIOTE interrupt */
NVIC_SetPriority(GPIOTE_IRQn, GPIO_IRQ_PRIO);
NVIC_EnableIRQ(GPIOTE_IRQn);
/* save callback */
gpio_config.cb = cb;
/* reset GPIOTE configuration register to EVENT mode*/
NRF_GPIOTE->CONFIG[0] = GPIOTE_CONFIG_MODE_Event;
/* select active pin for external interrupt */
NRF_GPIOTE->CONFIG[0] |= (pin << GPIOTE_CONFIG_PSEL_Pos);
/* set active flank */
switch (flank) {
case GPIO_FALLING:
NRF_GPIOTE->CONFIG[0] |= (1 << GPIOTE_CONFIG_POLARITY_Pos);
break;
case GPIO_RISING:
NRF_GPIOTE->CONFIG[0] |= (2 << GPIOTE_CONFIG_POLARITY_Pos);
break;
case GPIO_BOTH:
NRF_GPIOTE->CONFIG[0] |= (3 << GPIOTE_CONFIG_POLARITY_Pos);
break;
}
/* enable external interrupt */
NRF_GPIOTE->INTENSET |= GPIOTE_INTENSET_IN0_Msk;
return 0;
}
int gpio_irq_enable(gpio_t dev)
{
NRF_GPIOTE->INTENSET |= GPIOTE_INTENSET_IN0_Msk;
return 0;
}
int gpio_irq_disable(gpio_t dev)
{
NRF_GPIOTE->INTENCLR |= GPIOTE_INTENSET_IN0_Msk;
return 0;
}
int gpio_read(gpio_t dev)
{
uint32_t pin;
int res = -1;
/* get pin */
pin = get_pin(dev);
if (pin < 0) {
return pin;
}
/* read pin value depending if pin is input or output */
if (NRF_GPIO->DIR & (1 << pin)) {
res = (NRF_GPIO->OUT & (1 << pin));
}
else {
res = (NRF_GPIO->IN & (1 << pin));
}
/* fix issue with negative number if pin 31 is set */
if (res < -1) {
res = 1;
}
return -1;
}
int gpio_set(gpio_t dev)
{
int pin = get_pin(dev);
if (pin < 0) {
return pin;
}
NRF_GPIO->OUTSET = (1 << pin);
return 0;
}
int gpio_clear(gpio_t dev)
{
int pin = get_pin(dev);
if (pin < 0) {
return pin;
}
NRF_GPIO->OUTCLR = (1 << pin);
return 0;
}
int gpio_toggle(gpio_t dev)
{
if (gpio_read(dev)) {
return gpio_clear(dev);
} else {
return gpio_set(dev);
}
}
int gpio_write(gpio_t dev, int value)
{
if (value) {
return gpio_set(dev);
} else {
return gpio_clear(dev);
}
}
__attribute__((naked)) void isr_gpiote(void)
{
ISR_ENTER();
if (NRF_GPIOTE->EVENTS_IN[0] == 1)
{
NRF_GPIOTE->EVENTS_IN[0] = 0;
gpio_config.cb();
}
if (sched_context_switch_request) {
thread_yield();
}
ISR_EXIT();
}

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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file timer.c
* @brief Low-level timer driver implementation
*
* @author Christian Kühling <kuehling@zedat.fu-berlin.de>
* @author Timo Ziegler <timo.ziegler@fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdlib.h>
#include <stdio.h>
#include "cpu.h"
#include "board.h"
#include "sched.h"
#include "thread.h"
#include "periph_conf.h"
#include "periph/timer.h"
#include "nrf51.h"
#include "nrf51_bitfields.h"
typedef struct {
void (*cb)(int);
} timer_conf_t;
/**
* timer state memory
*/
static timer_conf_t timer_config[TIMER_NUMOF];
int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int))
{
NRF_TIMER_Type *timer;
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
timer = TIMER_0_DEV;
timer->BITMODE = TIMER_BITMODE_BITMODE_32Bit; /* 32 Bit Mode */
NVIC_SetPriority(TIMER_0_IRQ, TIMER_IRQ_PRIO);
NVIC_EnableIRQ(TIMER_0_IRQ);
break;
#endif
#if TIMER_1_EN
case TIMER_1:
timer = TIMER_1_DEV;
timer->BITMODE = TIMER_BITMODE_BITMODE_16Bit; /* 16 Bit Mode */
NVIC_SetPriority(TIMER_1_IRQ, TIMER_IRQ_PRIO);
NVIC_EnableIRQ(TIMER_1_IRQ);
break;
#endif
#if TIMER_2_EN
case TIMER_2:
timer = TIMER_2_DEV;
timer->BITMODE = TIMER_BITMODE_BITMODE_16Bit; /* 16 Bit Mode */
NVIC_SetPriority(TIMER_2_IRQ, TIMER_IRQ_PRIO);
NVIC_EnableIRQ(TIMER_2_IRQ);
break;
#endif
case TIMER_UNDEFINED:
return -1;
}
/* save callback */
timer_config[dev].cb = callback;
timer->TASKS_STOP = 1;
timer->MODE = TIMER_MODE_MODE_Timer; /* set the timer in Timer Mode. */
timer->TASKS_CLEAR = 1; /* clear the task first to be usable for later. */
switch (ticks_per_us) {
case 1:
timer->PRESCALER = 4;
break;
case 2:
timer->PRESCALER = 5;
break;
case 4:
timer->PRESCALER = 6;
break;
case 8:
timer->PRESCALER = 7;
break;
case 16:
timer->PRESCALER = 8;
break;
default:
return -1;
}
/* timer->INTENSET = TIMER_INTENSET_COMPARE0_Enabled << TIMER_INTENSET_COMPARE0_Pos; */
timer->SHORTS = (TIMER_SHORTS_COMPARE0_CLEAR_Enabled << TIMER_SHORTS_COMPARE0_CLEAR_Pos);
timer->SHORTS = (TIMER_SHORTS_COMPARE1_CLEAR_Enabled << TIMER_SHORTS_COMPARE1_CLEAR_Pos);
timer->SHORTS = (TIMER_SHORTS_COMPARE2_CLEAR_Enabled << TIMER_SHORTS_COMPARE2_CLEAR_Pos);
timer->SHORTS = (TIMER_SHORTS_COMPARE3_CLEAR_Enabled << TIMER_SHORTS_COMPARE3_CLEAR_Pos);
timer->TASKS_START = 1;
return 1;
}
int timer_set(tim_t dev, int channel, unsigned int timeout)
{
uint32_t now = timer_read(dev);
return timer_set_absolute(dev, channel, (now + timeout - 1));
}
int timer_set_absolute(tim_t dev, int channel, unsigned int value)
{
volatile NRF_TIMER_Type * timer;
/* get timer base register address */
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
timer = TIMER_0_DEV;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
timer = TIMER_1_DEV;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
timer = TIMER_2_DEV;
break;
#endif
case TIMER_UNDEFINED:
return -1;
}
switch (channel) {
case 0:
timer->CC[0] = value;
timer->INTENSET |= TIMER_INTENSET_COMPARE0_Msk;
break;
case 1:
timer->CC[1] = value;
timer->INTENSET |= TIMER_INTENSET_COMPARE1_Msk;
break;
case 2:
timer->CC[2] = value;
timer->INTENSET |= TIMER_INTENSET_COMPARE2_Msk;
break;
default:
return -2;
}
return 1;
}
int timer_clear(tim_t dev, int channel)
{
NRF_TIMER_Type *timer;
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
timer = TIMER_0_DEV;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
timer = TIMER_1_DEV;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
timer = TIMER_2_DEV;
break;
#endif
case TIMER_UNDEFINED:
return -1;
}
/* set timeout value */
switch (channel) {
case 0:
timer->INTENCLR = TIMER_INTENCLR_COMPARE0_Msk;
break;
case 1:
timer->INTENCLR = TIMER_INTENCLR_COMPARE1_Msk;
break;
case 2:
timer->INTENCLR = TIMER_INTENCLR_COMPARE2_Msk;
break;
default:
return -2;
}
return 1;
}
unsigned int timer_read(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV->TASKS_CAPTURE[3] = 1;
return TIMER_0_DEV->CC[3];
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->TASKS_CAPTURE[3] = 1;
return TIMER_1_DEV->CC[3];
#endif
#if TIMER_2_EN
case TIMER_2:
TIMER_2_DEV->TASKS_CAPTURE[3] = 1;
return TIMER_2_DEV->CC[3];
#endif
case TIMER_UNDEFINED:
default:
return 0;
}
}
void timer_start(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV->TASKS_START = 1;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->TASKS_START = 1;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
TIMER_2_DEV->TASKS_START = 1;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
void timer_stop(tim_t dev) {
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV->TASKS_STOP = 1;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->TASKS_STOP = 1;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
TIMER_2_DEV->TASKS_STOP = 1;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
void timer_irq_enable(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
NVIC_EnableIRQ(TIMER_0_IRQ);
break;
#endif
#if TIMER_1_EN
case TIMER_1:
NVIC_EnableIRQ(TIMER_1_IRQ);
break;
#endif
#if TIMER_2_EN
case TIMER_2:
NVIC_EnableIRQ(TIMER_2_IRQ);
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
void timer_irq_disable(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
NVIC_DisableIRQ(TIMER_0_IRQ);
break;
#endif
#if TIMER_1_EN
case TIMER_1:
NVIC_DisableIRQ(TIMER_1_IRQ);
break;
#endif
#if TIMER_2_EN
case TIMER_2:
NVIC_DisableIRQ(TIMER_2_IRQ);
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
void timer_reset(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV->TASKS_CLEAR = 1;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->TASKS_CLEAR = 1;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
TIMER_2_DEV->TASKS_CLEAR = 1;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
#if TIMER_0_EN
__attribute__((naked)) void TIMER_0_ISR(void)
{
ISR_ENTER();
for(int i = 0; i < TIMER_0_CHANNELS; i++){
if(TIMER_0_DEV->EVENTS_COMPARE[i] == 1){
TIMER_0_DEV->EVENTS_COMPARE[i] = 0;
TIMER_0_DEV->INTENCLR = (1 << (16 + i));
timer_config[TIMER_0].cb(i);
}
}
if (sched_context_switch_request) {
thread_yield();
}
ISR_EXIT();
}
#endif
#if TIMER_1_EN
__attribute__((naked)) void TIMER_1_ISR(void)
{
ISR_ENTER();
for(int i = 0; i < TIMER_1_CHANNELS; i++){
if(TIMER_1_DEV->EVENTS_COMPARE[i] == 1){
TIMER_1_DEV->EVENTS_COMPARE[i] = 0;
TIMER_1_DEV->INTENCLR = (1 << (16 + i));
timer_config[TIMER_1].cb(i);
}
}
if (sched_context_switch_request) {
thread_yield();
}
ISR_EXIT();
}
#endif
#if TIMER_2_EN
__attribute__((naked)) void TIMER_2_ISR(void)
{
ISR_ENTER();
for(int i = 0; i < TIMER_2_CHANNELS; i++){
if(TIMER_2_DEV->EVENTS_COMPARE[i] == 1){
TIMER_2_DEV->EVENTS_COMPARE[i] = 0;
TIMER_2_DEV->INTENCLR = (1 << (16 + i));
timer_config[TIMER_2].cb(i);
}
}
if (sched_context_switch_request) {
thread_yield();
}
ISR_EXIT();
}
#endif

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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file uart.c
* @brief Low-level UART driver implementation
*
* @author Christian Kühling <kuehling@zedat.fu-berlin.de>
* @author Timo Ziegler <timo.ziegler@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "cpu.h"
#include "periph_conf.h"
#include "periph/uart.h"
#include "board.h"
#define ENABLE_DEBUG (0)
#include "debug.h"
/**
* @brief Each UART device has to store two callbacks.
*/
typedef struct {
void (*rx_cb)(char);
void (*tx_cb)(void);
} uart_conf_t;
/**
* @brief Allocate memory to store the callback functions.
*
* TODO: this function needs to be implemented
*/
int uart_init(uart_t uart, uint32_t baudrate, void (*rx_cb)(char), void (*tx_cb)(void))
{
int res;
/* initialize UART in blocking mode fist */
res = uart_init_blocking(uart, baudrate);
if (res != 0) {
return res;
}
return -1;
}
int uart_init_blocking(uart_t uart, uint32_t baudrate)
{
uint32_t baudrate_real;
switch (baudrate) {
case 1200:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud1200;
break;
case 2400:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud2400;
break;
case 4800:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud4800;
break;
case 9600:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud9600;
break;
case 14400:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud14400;
break;
case 19200:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud19200;
break;
case 28800:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud28800;
break;
case 38400:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud38400;
break;
case 57600:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud57600;
break;
case 76800:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud76800;
break;
case 115200:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud115200;
break;
case 230400:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud230400;
break;
case 250000:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud250000;
break;
case 460800:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud460800;
break;
case 921600:
baudrate_real = UART_BAUDRATE_BAUDRATE_Baud921600;
break;
default:
return -1;
}
switch (uart) {
#if UART_0_EN
case UART_0:
/* reset configuration registers */
UART_0_DEV->CONFIG = 0;
/* select baudrate */
UART_0_DEV->BAUDRATE = baudrate_real;
/* configure UART pins to use */
UART_0_DEV->PSELTXD = UART_0_PIN_TX;
UART_0_DEV->PSELRXD = UART_0_PIN_RX;
/* enable hw-flow control if defined */
#if UART_0_HWFLOWCTRL
UART_0_DEV->PSELRTS = UART_0_PIN_RTS;
UART_0_DEV->PSELCTS = UART_0_PIN_CTS;
UART_0_DEV->CONFIG |= 1; /* enable HW flow control */
#else
UART_0_DEV->PSELRTS = 0xffffffff; /* pin disconnected */
UART_0_DEV->PSELCTS = 0xffffffff; /* pin disconnected */
#endif
/* enable the UART device */
UART_0_DEV->ENABLE = UART_ENABLE_ENABLE_Enabled;
/* enable TX and RX */
UART_0_DEV->TASKS_STARTTX = 1;
UART_0_DEV->TASKS_STARTRX = 1;
break;
#endif
case UART_UNDEFINED:
return -2;
break;
}
DEBUG("UART INITIALIZATION complete\n");
return 0;
}
void uart_tx_begin(uart_t uart)
{
/* TODO: to be implemented */
}
void uart_tx_end(uart_t uart)
{
/* TODO: to be implemented */
}
int uart_write(uart_t uart, char data)
{
switch (uart) {
case UART_0:
UART_0_DEV->TXD = (uint8_t)data;
break;
case UART_UNDEFINED:
return -1;
}
return 1;
}
int uart_read_blocking(uart_t uart, char *data)
{
switch (uart) {
case UART_0:
DEBUG("READING CHAR\n");
/* wait for until data was received (RXDRDY == 1) */
while (UART_0_DEV->EVENTS_RXDRDY != 1);
DEBUG("RXDRDY was set\n");
/* reset RXDRDY flag */
UART_0_DEV->EVENTS_RXDRDY = 0;
/* read new byte from receive data register */
DEBUG("Reading data\n");
*data = (char)(UART_0_DEV->RXD & 0xff);
break;
case UART_UNDEFINED:
return -1;
}
return 1;
}
int uart_write_blocking(uart_t uart, char data)
{
switch (uart) {
case UART_0:
/* write data into transmit register */
UART_0_DEV->TXD = (uint8_t)data;
/* wait for any transmission to be done */
while (UART_0_DEV->EVENTS_TXDRDY == 0);
/* reset ready flag */
UART_0_DEV->EVENTS_TXDRDY = 0;
break;
case UART_UNDEFINED:
return -1;
}
return 1;
}

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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file
* @brief Implementation of the kernels reboot interface
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdio.h>
#include "arch/reboot_arch.h"
#include "cpu.h"
int reboot_arch(int mode)
{
printf("Going into reboot, mode %i\n", mode);
NVIC_SystemReset();
return 0;
}

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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file startup.c
* @brief Startup code and interrupt vector definition
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include "board.h"
/**
* memory markers as defined in the linker script
*/
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/**
* @brief functions for initializing the board, std-lib and kernel
*/
extern void board_init(void);
extern void kernel_init(void);
extern void __libc_init_array(void);
/**
* @brief This function is the entry point after a system reset
*
* After a system reset, the following steps are necessary and carried out:
* 1. load data section from flash to ram
* 2. overwrite uninitialized data section (BSS) with zeros
* 3. initialize the newlib
* 4. initialize the board (sync clock, setup std-IO)
* 5. initialize and start RIOTs kernel
*/
void reset_handler(void)
{
uint32_t *dst;
uint32_t *src = &_etext;
/* load data section from flash to ram */
for (dst = &_srelocate; dst < &_erelocate; ) {
*(dst++) = *(src++);
}
/* default bss section to zero */
for (dst = &_szero; dst < &_ezero; ) {
*(dst++) = 0;
}
/* initialize the board and startup the kernel */
board_init();
/* initialize std-c library (this should be done after board_init) */
__libc_init_array();
/* startup the kernel */
kernel_init();
}
/**
* @brief Default handler is called in case no interrupt handler was defined
*/
void dummy_handler(void)
{
while (1) {asm ("nop");}
}
void isr_nmi(void)
{
while (1) {asm ("nop");}
}
void isr_hard_fault(void)
{
LED_RED_ON;
while (1) {asm ("nop");}
}
/* Cortex-M specific interrupt vectors */
void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
/* nRF51822qfaa specific interrupt vector */
void isr_power_clock(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_radio(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_uart0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi0_twi0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_spi1_twi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_gpiote(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_adc(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_timer2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_temp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rng(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ecb(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_ccm_aar(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_wdt(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_rtc1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_qdec(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_lpcomp(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi0(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi1(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi2(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi3(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi4(void) __attribute__ ((weak, alias("dummy_handler")));
void isr_swi5(void) __attribute__ ((weak, alias("dummy_handler")));
/* interrupt vector table */
__attribute__ ((section(".vectors")))
const void *interrupt_vector[] = {
/* Stack pointer */
(void*) (&_estack), /* pointer to the top of the empty stack */
/* Cortex-M handlers */
(void*) reset_handler, /* entry point of the program */
(void*) isr_nmi, /* non maskable interrupt handler */
(void*) isr_hard_fault, /* if you end up here its not good */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_svc, /* system call interrupt */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* nRF51 specific peripheral handlers */
(void*) isr_power_clock, /* power_clock */
(void*) isr_radio, /* radio */
(void*) isr_uart0, /* uart0 */
(void*) isr_spi0_twi0, /* spi0_twi0 */
(void*) isr_spi1_twi1, /* spi1_twi1 */
(void*) (0UL), /* reserved */
(void*) isr_gpiote, /* gpiote */
(void*) isr_adc, /* adc */
(void*) isr_timer0, /* timer0 */
(void*) isr_timer1, /* timer1 */
(void*) isr_timer2, /* timer2 */
(void*) isr_rtc0, /* rtc0 */
(void*) isr_temp, /* temp */
(void*) isr_rng, /* rng */
(void*) isr_ecb, /* ecb */
(void*) isr_ccm_aar, /* ccm_aar */
(void*) isr_wdt, /* wdt */
(void*) isr_rtc1, /* rtc1 */
(void*) isr_qdec, /* qdec */
(void*) isr_lpcomp, /* lpcomp */
(void*) isr_swi0, /* swi0 */
(void*) isr_swi1, /* swi1 */
(void*) isr_swi2, /* swi2 */
(void*) isr_swi3, /* swi3 */
(void*) isr_swi4, /* swi4 */
(void*) isr_swi5, /* swi5 */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
};

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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_nrf51822
* @{
*
* @file syscalls.c
* @brief NewLib system calls implementations for nRF51822
*
* @author Michael Baar <michael.baar@fu-berlin.de>
* @author Stefan Pfeiffer <pfeiffer@inf.fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <errno.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/stat.h>
#include <sys/unistd.h>
#include <stdint.h>
#include "board.h"
#include "thread.h"
#include "kernel.h"
#include "irq.h"
#include "periph/uart.h"
/**
* manage the heap
*/
extern uint32_t _end; /* address of last used memory cell */
caddr_t heap_top = (caddr_t)&_end + 4;
/**
* @brief Initialize NewLib, called by __libc_init_array() from the startup script
*/
void _init(void)
{
uart_init_blocking(STDIO, STDIO_BAUDRATE);
}
/**
* @brief Free resources on NewLib de-initialization, not used for RIOT
*/
void _fini(void)
{
// nothing to do here
}
/**
* @brief Exit a program without cleaning up files
*
* If your system doesn't provide this, it is best to avoid linking with subroutines that
* require it (exit, system).
*
* @param n the exit code, 0 for all OK, >0 for not OK
*/
void _exit(int n)
{
printf("#! exit %i: resetting\n", n);
NVIC_SystemReset();
while(1);
}
/**
* @brief Allocate memory from the heap.
*
* The current heap implementation is very rudimentary, it is only able to allocate
* memory. But it does not
* - check if the returned address is valid (no check if the memory very exists)
* - have any means to free memory again
*
* TODO: check if the requested memory is really available
*
* @return [description]
*/
caddr_t _sbrk_r(struct _reent *r, size_t incr)
{
unsigned int state = disableIRQ();
caddr_t res = heap_top;
heap_top += incr;
restoreIRQ(state);
return res;
}
/**
* @brief Get the process-ID of the current thread
*
* @return the process ID of the current thread
*/
int _getpid(void)
{
return sched_active_thread->pid;
}
/**
* @brief Send a signal to a given thread
*
* @param r TODO
* @param pid TODO
* @param sig TODO
*
* @return TODO
*/
int _kill_r(struct _reent *r, int pid, int sig)
{
r->_errno = ESRCH; /* not implemented yet */
return -1;
}
/**
* @brief Open a file
*
* @param r TODO
* @param name TODO
* @param mode TODO
*
* @return TODO
*/
int _open_r(struct _reent *r, const char *name, int mode)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}
/**
* @brief Read from a file
*
* All input is read from UART_0. The function will block until a byte is actually read.
*
* Note: the read function does not buffer - data will be lost if the function is not
* called fast enough.
*
* TODO: implement more sophisticated read call.
*
* @param r TODO
* @param fd TODO
* @param buffer TODO
* @param int TODO
*
* @return TODO
*/
int _read_r(struct _reent *r, int fd, void *buffer, unsigned int count)
{
char c;
char *buff = (char*)buffer;
uart_read_blocking(STDIO, &c);
buff[0] = c;
return 1;
}
/**
* @brief Write characters to a file
*
* All output is currently directed to UART_0, independent of the given file descriptor.
* The write call will further block until the byte is actually written to the UART.
*
* TODO: implement more sophisticated write call.
*
* @param r TODO
* @param fd TODO
* @param data TODO
* @param int TODO
*
* @return TODO
*/
int _write_r(struct _reent *r, int fd, const void *data, unsigned int count)
{
char *c = (char*)data;
for (int i = 0; i < count; i++) {
uart_write_blocking(STDIO, c[i]);
}
return count;
}
/**
* @brief Close a file
*
* @param r TODO
* @param fd TODO
*
* @return TODO
*/
int _close_r(struct _reent *r, int fd)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}
/**
* @brief Set position in a file
*
* @param r TODO
* @param fd TODO
* @param pos TODO
* @param dir TODO
*
* @return TODO
*/
_off_t _lseek_r(struct _reent *r, int fd, _off_t pos, int dir)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}
/**
* @brief Status of an open file
*
* @param r TODO
* @param fd TODO
* @param stat TODO
*
* @return TODO
*/
int _fstat_r(struct _reent *r, int fd, struct stat * st)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}
/**
* @brief Status of a file (by name)
*
* @param r TODO
* @param name TODO
* @param stat TODO
*
* @return TODO
*/
int _stat_r(struct _reent *r, char *name, struct stat *st)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}
/**
* @brief Query whether output stream is a terminal
*
* @param r TODO
* @param fd TODO
*
* @return TODO
*/
int _isatty_r(struct _reent *r, int fd)
{
r->_errno = 0;
if(fd == STDOUT_FILENO || fd == STDERR_FILENO) {
return 1;
}
else {
return 0;
}
}
/**
* @brief Remove a file's directory entry
*
* @param r TODO
* @param path TODO
*
* @return TODO
*/
int _unlink_r(struct _reent *r, char* path)
{
r->_errno = ENODEV; /* not implemented yet */
return -1;
}

4
examples/ccn-lite-client/Makefile
View File

@ -29,7 +29,7 @@ QUIET ?= 1
BOARD_INSUFFICIENT_RAM := chronos msb-430h telosb wsn430-v1_3b wsn430-v1_4 z1 redbee-econotag
BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 \
stm32f0discovery stm32f3discovery stm32f4discovery
stm32f0discovery stm32f3discovery stm32f4discovery pca10000 pca10005
# mbed_lpc1768: see https://github.com/RIOT-OS/RIOT/issues/675
# msb-430: see https://github.com/RIOT-OS/RIOT/issues/658
# pttu: see https://github.com/RIOT-OS/RIOT/issues/659
@ -37,6 +37,8 @@ BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 \
# stm32f0discovery: no transceiver, yet
# stm32f3discovery: no transceiver, yet
# stm32f4discovery: no transceiver, yet
# pca10000: no transceiver, yet
# pca10005: no transceiver, yet
# Modules to include:

4
examples/ccn-lite-relay/Makefile
View File

@ -29,7 +29,8 @@ QUIET ?= 1
BOARD_INSUFFICIENT_RAM := chronos msb-430h telosb wsn430-v1_3b wsn430-v1_4 z1 redbee-econotag
BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 \
stm32f0discovery stm32f3discovery stm32f4discovery
stm32f0discovery stm32f3discovery stm32f4discovery \
pca10000 pca10005
# mbed_lpc1768: see https://github.com/RIOT-OS/RIOT/issues/675
# msb-430: see https://github.com/RIOT-OS/RIOT/issues/658
# pttu: see https://github.com/RIOT-OS/RIOT/issues/659
@ -37,6 +38,7 @@ BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 \
# stm32f0discovery: no transceiver, yet
# stm32f3discovery: no transceiver, yet
# stm32f4discovery: no transceiver, yet
# pca10000/5: no transceiver, yet
# Modules to include:

4
examples/riot_and_cpp/Makefile
View File

@ -30,7 +30,7 @@ QUIET ?= 1
# Blacklist boards
BOARD_BLACKLIST := arduino-due avsextrem chronos mbed_lpc1768 msb-430h msba2 redbee-econotag \
telosb wsn430-v1_3b wsn430-v1_4 msb-430 pttu udoo qemu-i386 z1 stm32f0discovery \
stm32f3discovery stm32f4discovery
stm32f3discovery stm32f4discovery pca10000 pca10005
# This example only works with native for now.
# msb430-based boards: msp430-g++ is not provided in mspgcc.
# (People who want use c++ can build c++ compiler from source, or get binaries from Energia http://energia.nu/)
@ -38,6 +38,8 @@ BOARD_BLACKLIST := arduino-due avsextrem chronos mbed_lpc1768 msb-430h msba2 red
# stm32f0discovery: g++ does not support some used flags (e.g. -mthumb...)
# stm32f3discovery: g++ does not support some used flags (e.g. -mthumb...)
# stm32f4discovery: g++ does not support some used flags (e.g. -mthumb...)
# pca10000: g++ does not support some used flags (e.g. -mthumb...)
# pca10005: g++ does not support some used flags (e.g. -mthumb...)
# others: untested.
# If you want to add some extra flags when compile c++ files, add these flags

4
examples/rpl_udp/Makefile
View File

@ -36,7 +36,7 @@ endif
BOARD_INSUFFICIENT_RAM := chronos msb-430h redbee-econotag telosb wsn430-v1_3b wsn430-v1_4 z1
BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 stm32f0discovery \
stm32f3discovery stm32f4discovery
stm32f3discovery stm32f4discovery pca10000 pca10005
# mbed_lpc1768: see https://github.com/RIOT-OS/RIOT/issues/675
# msb-430: see https://github.com/RIOT-OS/RIOT/issues/658
# pttu: see https://github.com/RIOT-OS/RIOT/issues/659
@ -44,6 +44,8 @@ BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 pttu udoo qemu-i386 stm32f0d
# stm32f0discovery: no transceiver, yet
# stm32f3discovery: no transceiver, yet
# stm32f4discovery: no transceiver, yet
# pca10000: no transceiver, yet
# pca10005: no transceiver, yet
# Modules to include:

2
tests/bloom/Makefile
View File

@ -3,7 +3,7 @@ include ../Makefile.tests_common
BOARD_INSUFFICIENT_RAM := chronos mbed_lpc1768 msb-430 msb-430h redbee-econotag \
telosb wsn430-v1_3b wsn430-v1_4 z1 stm32f0discovery \
stm32f3discovery
stm32f3discovery pca10000 pca10005
USEMODULE += hashes
USEMODULE += bloom

3
tests/coap/Makefile
View File

@ -2,7 +2,8 @@ APPLICATION = coap
include ../Makefile.tests_common
BOARD_BLACKLIST := arduino-due chronos mbed_lpc1768 msb-430 msb-430h qemu-i386 stm32f0discovery \
stm32f3discovery stm32f4discovery telosb wsn430-v1_3b wsn430-v1_4 udoo z1
stm32f3discovery stm32f4discovery telosb wsn430-v1_3b wsn430-v1_4 udoo z1 \
pca10000 pca10005
BOARD_INSUFFICIENT_RAM := redbee-econotag
#MSP boards: no assert.h
#rest: no radio

6
tests/net_if/Makefile
View File

@ -1,12 +1,14 @@
APPLICATION = net_if
BOARD_BLACKLIST = mbed_lpc1768 arduino-due udoo qemu-i386 stm32f0discovery stm32f3discovery \
stm32f4discovery
stm32f4discovery pca10000 pca10005
# qemu-i386: no transceiver, yet
# stm32f0discovery: no transceiver, yet
# stm32f3discovery: no transceiver, yet
# stm32f4discovery: no transceiver, yet
# pca10000: no transceiver, yet
# pca10005: no transceiver, yet
include ../Makefile.tests_common
ifeq ($(BOARD),stm32f4discovery)

4
tests/pnet/Makefile
View File

@ -3,13 +3,15 @@ include ../Makefile.tests_common
BOARD_INSUFFICIENT_RAM := chronos msb-430h redbee-econotag telosb wsn430-v1_3b wsn430-v1_4 z1
BOARD_BLACKLIST := arduino-due mbed_lpc1768 msb-430 udoo qemu-i386 stm32f0discovery \
stm32f3discovery stm32f4discovery
stm32f3discovery stm32f4discovery pca10000 pca10005
# mbed_lpc1768: see https://github.com/RIOT-OS/RIOT/issues/675
# msb-430: see https://github.com/RIOT-OS/RIOT/issues/658
# qemu-i386: no transceiver, yet
# stm32f0discovery: no transceiver, yet
# stm32f3discovery: no transceiver, yet
# stm32f4discovery: no transceiver, yet
# pca10000: no transceiver, yet
# pca10005: no transceiver, yet
USEMODULE += posix
USEMODULE += pnet

3
tests/posix_semaphore/Makefile
View File

@ -1,7 +1,8 @@
APPLICATION = posix_semaphore
include ../Makefile.tests_common
BOARD_INSUFFICIENT_RAM := msb-430 msb-430h mbed_lpc1768 redbee-econotag chronos stm32f0discovery
BOARD_INSUFFICIENT_RAM := msb-430 msb-430h mbed_lpc1768 redbee-econotag chronos stm32f0discovery \
pca10000 pca10005
USEMODULE += posix

3
tests/pthread_rwlock/Makefile
View File

@ -9,6 +9,7 @@ DISABLE_MODULE += auto_init
CFLAGS += -DNATIVE_AUTO_EXIT
BOARD_INSUFFICIENT_RAM += chronos mbed_lpc1768 msb-430 msb-430h stm32f0discovery
BOARD_INSUFFICIENT_RAM += chronos mbed_lpc1768 msb-430 msb-430h stm32f0discovery \
pca10000 pca10005
include $(RIOTBASE)/Makefile.include

2
tests/queue_fairness/Makefile
View File

@ -1,7 +1,7 @@
APPLICATION = queue_fairness
include ../Makefile.tests_common
BOARD_INSUFFICIENT_RAM := mbed_lpc1768 stm32f0discovery
BOARD_INSUFFICIENT_RAM := mbed_lpc1768 stm32f0discovery pca10000 pca10005
USEMODULE += vtimer

3
tests/thread_cooperation/Makefile
View File

@ -1,7 +1,8 @@
APPLICATION = thread_cooperation
include ../Makefile.tests_common
BOARD_INSUFFICIENT_RAM := chronos msb-430 msb-430h mbed_lpc1768 redbee-econotag stm32f0discovery
BOARD_INSUFFICIENT_RAM := chronos msb-430 msb-430h mbed_lpc1768 redbee-econotag stm32f0discovery \
pca10000 pca10005
DISABLE_MODULE += auto_init

2
tests/vtimer_msg_diff/Makefile
View File

@ -1,7 +1,7 @@
APPLICATION = vtimer_msg_diff
include ../Makefile.tests_common
BOARD_INSUFFICIENT_RAM := mbed_lpc1768 stm32f0discovery
BOARD_INSUFFICIENT_RAM := mbed_lpc1768 stm32f0discovery pca10000 pca10005
USEMODULE += vtimer