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cpu/atmega_common/periph/timer.c: uncrustified
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@ -29,18 +29,18 @@
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#include "periph/timer.h"
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#include "periph/timer.h"
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#include "periph_conf.h"
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#include "periph_conf.h"
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#define ENABLE_DEBUG (0)
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#include "debug.h"
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/**
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/**
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* @brief All timers have three channels
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* @brief All timers have three channels
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*/
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*/
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#define CHANNELS (3)
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#define CHANNELS (3)
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/**
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/**
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* @brief We have 5 possible prescaler values
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* @brief We have 5 possible prescaler values
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*/
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*/
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#define PRESCALE_NUMOF (5U)
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#define PRESCALE_NUMOF (5U)
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/**
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/**
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* @brief Possible prescaler values, encoded as 2 ^ val
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* @brief Possible prescaler values, encoded as 2 ^ val
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@ -51,13 +51,13 @@ static const uint8_t prescalers[] = { 0, 3, 6, 8, 10 };
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* @brief Timer state context
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* @brief Timer state context
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*/
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*/
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typedef struct {
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typedef struct {
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mega_timer_t *dev; /**< timer device */
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mega_timer_t *dev; /**< timer device */
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volatile uint8_t *mask; /**< address of interrupt mask register */
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volatile uint8_t *mask; /**< address of interrupt mask register */
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volatile uint8_t *flag; /**< address of interrupt flag register */
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volatile uint8_t *flag; /**< address of interrupt flag register */
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timer_cb_t cb; /**< interrupt callback */
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timer_cb_t cb; /**< interrupt callback */
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void *arg; /**< interrupt callback argument */
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void *arg; /**< interrupt callback argument */
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uint8_t mode; /**< remember the configured mode */
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uint8_t mode; /**< remember the configured mode */
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uint8_t isrs; /**< remember the interrupt state */
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uint8_t isrs; /**< remember the interrupt state */
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} ctx_t;
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} ctx_t;
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/**
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/**
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@ -109,8 +109,8 @@ int timer_init(tim_t tim, unsigned long freq, timer_cb_t cb, void *arg)
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ctx[tim].dev->CNT = 0;
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ctx[tim].dev->CNT = 0;
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/* save interrupt context and timer mode */
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/* save interrupt context and timer mode */
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ctx[tim].cb = cb;
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ctx[tim].cb = cb;
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ctx[tim].arg = arg;
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ctx[tim].arg = arg;
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ctx[tim].mode = (pre + 1);
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ctx[tim].mode = (pre + 1);
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/* enable timer with calculated prescaler */
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/* enable timer with calculated prescaler */
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@ -128,7 +128,7 @@ int timer_set_absolute(tim_t tim, int channel, unsigned int value)
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ctx[tim].dev->OCR[channel] = (uint16_t)value;
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ctx[tim].dev->OCR[channel] = (uint16_t)value;
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*ctx[tim].flag &= ~(1 << (channel + OCF1A));
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*ctx[tim].flag &= ~(1 << (channel + OCF1A));
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*ctx[tim].mask |= (1 << (channel + OCIE1A));
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*ctx[tim].mask |= (1 << (channel + OCIE1A));
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return 1;
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return 1;
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}
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}
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@ -187,8 +187,8 @@ ISR(TIMER_0_ISRC, ISR_BLOCK)
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{
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{
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_isr(0, 2);
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_isr(0, 2);
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}
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}
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#endif /* TIMER_0_ISRC */
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#endif /* TIMER_0_ISRC */
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#endif /* TIMER_0 */
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#endif /* TIMER_0 */
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#ifdef TIMER_1
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#ifdef TIMER_1
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ISR(TIMER_1_ISRA, ISR_BLOCK)
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ISR(TIMER_1_ISRA, ISR_BLOCK)
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@ -206,8 +206,8 @@ ISR(TIMER_1_ISRC, ISR_BLOCK)
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{
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{
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_isr(1, 2);
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_isr(1, 2);
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}
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}
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#endif /* TIMER_1_ISRC */
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#endif /* TIMER_1_ISRC */
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#endif /* TIMER_1 */
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#endif /* TIMER_1 */
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#ifdef TIMER_2
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#ifdef TIMER_2
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ISR(TIMER_2_ISRA, ISR_BLOCK)
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ISR(TIMER_2_ISRA, ISR_BLOCK)
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