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cpu/esp32/i2c_sw: add delays for 2 and 40 MHz
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@ -851,7 +851,7 @@ Beside the I2C hardware implementation, a I2C bit-banging protocol software impl
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used. This implementation allows bus speeds up to 1 Mbps (`I2C_SPEED_FAST_PLUS`). It can be
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used. This implementation allows bus speeds up to 1 Mbps (`I2C_SPEED_FAST_PLUS`). It can be
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activated by adding
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activated by adding
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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USEMODULE += esp_i2c_hw
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USEMODULE += esp_i2c_sw
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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to application's makefile. The Disadvantage of the software implementation is that it uses busy
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to application's makefile. The Disadvantage of the software implementation is that it uses busy
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waiting.
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waiting.
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@ -105,18 +105,23 @@ static _i2c_bus_t _i2c_bus[I2C_NUMOF] = {};
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#pragma GCC optimize ("O2")
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#pragma GCC optimize ("O2")
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#ifdef MCU_ESP32
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#ifdef MCU_ESP32
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static const uint32_t _i2c_delays[][3] =
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static const uint32_t _i2c_delays[][5] =
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{
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{
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/* values specify one half-period and are only valid for -O2 option */
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/* values specify one half-period and are only valid for -O2 option */
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/* value = [period - 0.25 us (240 MHz) / 0.5us(160MHz) / 1.0us(80MHz)] */
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/* value = [period - 0.25 us (240 MHz) / 0.5us(160MHz) / 1.0us(80MHz)] */
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/* * cycles per second / 2 */
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/* * cycles per second / 2 */
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/* 1 us = 16 cycles (80 MHz) / 32 cycles (160 MHz) / 48 cycles (240) */
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/* 1 us = 16 cycles (80 MHz) / 32 cycles (160 MHz) / 48 cycles (240) */
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/* values for 80, 160, 240 MHz */
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/* max clock speeds 2 MHz CPU clock: 19 kHz */
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[I2C_SPEED_LOW] = {790, 1590, 2390}, /* 10 kbps (period 100 us) */
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/* 40 MHz CPU clock: 308 kHz */
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[I2C_SPEED_NORMAL] = { 70, 150, 230}, /* 100 kbps (period 10 us) */
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/* 80 MHz CPU clock: 516 kHz */
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[I2C_SPEED_FAST] = { 11, 31, 51}, /* 400 kbps (period 2.5 us) */
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/* 160 MHz CPU clock: 727 kHz */
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[I2C_SPEED_FAST_PLUS] = { 0, 7, 15}, /* 1 Mbps (period 1 us) */
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/* 240 MHz CPU clock: 784 kHz */
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[I2C_SPEED_HIGH] = { 0, 0, 0} /* 3.4 Mbps (period 0.3 us) not working */
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/* values for 80, 160, 240, 2, 40 MHz */
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[I2C_SPEED_LOW] = {790, 1590, 2390, 10, 390 }, /* 10 kbps (period 100 us) */
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[I2C_SPEED_NORMAL] = { 70, 150, 230, 0, 30 }, /* 100 kbps (period 10 us) */
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[I2C_SPEED_FAST] = { 11, 31, 51, 0, 0 }, /* 400 kbps (period 2.5 us) */
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[I2C_SPEED_FAST_PLUS] = { 0, 0, 0, 0, 0 }, /* 1 Mbps (period 1 us) */
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[I2C_SPEED_HIGH] = { 0, 0, 0, 0, 0 } /* 3.4 Mbps (period 0.3 us) not working */
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};
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};
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#else /* MCU_ESP32 */
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#else /* MCU_ESP32 */
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static const uint32_t _i2c_delays[][2] =
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static const uint32_t _i2c_delays[][2] =
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@ -158,10 +163,8 @@ void i2c_init(i2c_t dev)
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assert(dev < I2C_NUMOF_MAX);
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assert(dev < I2C_NUMOF_MAX);
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assert(dev < I2C_NUMOF);
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assert(dev < I2C_NUMOF);
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if (i2c_config[dev].speed == I2C_SPEED_HIGH) {
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/* clock speeds up to 1 MHz are supported */
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LOG_TAG_INFO("i2c", "I2C_SPEED_HIGH is not supported\n");
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assert(i2c_config[dev].speed <= I2C_SPEED_FAST_PLUS);
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return;
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}
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mutex_init(&_i2c_bus[dev].lock);
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mutex_init(&_i2c_bus[dev].lock);
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@ -179,6 +182,8 @@ void i2c_init(i2c_t dev)
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case 160: _i2c_bus[dev].delay = _i2c_delays[_i2c_bus[dev].speed][1]; break;
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case 160: _i2c_bus[dev].delay = _i2c_delays[_i2c_bus[dev].speed][1]; break;
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#ifdef MCU_ESP32
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#ifdef MCU_ESP32
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case 240: _i2c_bus[dev].delay = _i2c_delays[_i2c_bus[dev].speed][2]; break;
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case 240: _i2c_bus[dev].delay = _i2c_delays[_i2c_bus[dev].speed][2]; break;
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case 2: _i2c_bus[dev].delay = _i2c_delays[_i2c_bus[dev].speed][3]; break;
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case 40: _i2c_bus[dev].delay = _i2c_delays[_i2c_bus[dev].speed][4]; break;
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#endif
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#endif
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default : LOG_TAG_INFO("i2c", "I2C software implementation is not "
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default : LOG_TAG_INFO("i2c", "I2C software implementation is not "
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"supported for this CPU frequency: %d MHz\n",
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"supported for this CPU frequency: %d MHz\n",
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