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pkg/uwb-core: adjust holdoff time when rxdiag_enabled

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Reading the diagnostic information adds a ~160us overhead, so holdoff
for that additional time.
This commit is contained in:
Francisco Molina 2022-04-20 14:21:02 +02:00
parent c56e28a7e6
commit 08055156e8
6 changed files with 6 additions and 6 deletions
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2
pkg/uwb-core/include/dpl_syscfg/syscfg_twr_ds.h
View File

@ -43,7 +43,7 @@ extern "C" {
* @brief tx holdoff delay for DS TWR (usec)
*/
#ifndef MYNEWT_VAL_TWR_DS_TX_HOLDOFF
#define MYNEWT_VAL_TWR_DS_TX_HOLDOFF (((uint32_t)0x0300))
#define MYNEWT_VAL_TWR_DS_TX_HOLDOFF (((uint32_t)0x0300 + 0xA0 * IS_USED(MODULE_UWB_CORE_RNG_TRX_INFO)))
#endif
#ifdef __cplusplus

2
pkg/uwb-core/include/dpl_syscfg/syscfg_twr_ds_ext.h
View File

@ -43,7 +43,7 @@ extern "C" {
* @brief tx holdoff delay for DS TWR extended frame (usec)
*/
#ifndef MYNEWT_VAL_TWR_DS_EXT_TX_HOLDOFF
#define MYNEWT_VAL_TWR_DS_EXT_TX_HOLDOFF (((uint32_t)0x0400))
#define MYNEWT_VAL_TWR_DS_EXT_TX_HOLDOFF (((uint32_t)0x0400 + 0xA0 * IS_USED(MODULE_UWB_CORE_RNG_TRX_INFO)))
#endif
#ifdef __cplusplus

2
pkg/uwb-core/include/dpl_syscfg/syscfg_twr_ss.h
View File

@ -43,7 +43,7 @@ extern "C" {
* @brief tx holdoff delay for SS TWR (usec)
*/
#ifndef MYNEWT_VAL_TWR_SS_TX_HOLDOFF
#define MYNEWT_VAL_TWR_SS_TX_HOLDOFF (((uint32_t)0x0300))
#define MYNEWT_VAL_TWR_SS_TX_HOLDOFF (((uint32_t)0x0300 + 0xA0 * IS_USED(MODULE_UWB_CORE_RNG_TRX_INFO)))
#endif
#ifdef __cplusplus

2
pkg/uwb-core/include/dpl_syscfg/syscfg_twr_ss_ack.h
View File

@ -43,7 +43,7 @@ extern "C" {
* @brief TOA timeout delay for SS TWR (usec)
*/
#ifndef MYNEWT_VAL_TWR_SS_ACK_TX_HOLDOFF
#define MYNEWT_VAL_TWR_SS_ACK_TX_HOLDOFF (((uint32_t)0x800))
#define MYNEWT_VAL_TWR_SS_ACK_TX_HOLDOFF (((uint32_t)0x800 + 0xA0 * IS_USED(MODULE_UWB_CORE_RNG_TRX_INFO)))
#endif
#ifdef __cplusplus

2
pkg/uwb-core/include/dpl_syscfg/syscfg_twr_ss_ext.h
View File

@ -43,7 +43,7 @@ extern "C" {
* @brief tx holdoff delay for SS EXT TWR (usec)
*/
#ifndef MYNEWT_VAL_TWR_SS_EXT_TX_HOLDOFF
#define MYNEWT_VAL_TWR_SS_EXT_TX_HOLDOFF (((uint32_t)0x0400))
#define MYNEWT_VAL_TWR_SS_EXT_TX_HOLDOFF (((uint32_t)0x0400 + 0xA0 * IS_USED(MODULE_UWB_CORE_RNG_TRX_INFO)))
#endif
#ifdef __cplusplus

2
pkg/uwb-core/include/dpl_syscfg/syscfg_uwb_rng.h
View File

@ -43,7 +43,7 @@ extern "C" {
* @brief worstcase tx holdoff delay for all TWR modes (usec)
*/
#ifndef MYNEWT_VAL_RNG_TX_HOLDOFF
#define MYNEWT_VAL_RNG_TX_HOLDOFF (((uint32_t)0x0320))
#define MYNEWT_VAL_RNG_TX_HOLDOFF (((uint32_t)0x0320 + 0xA0 * IS_USED(MODULE_UWB_CORE_RNG_TRX_INFO)))
#endif
/**