1
0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

boards: add support for SODAQ Autonomo

The following features were tested (briefly):
* UART (the first)
* I2C using a BMP180 on a SODAQ TPH board
* SPI0, connected to the on-board serial data flash (only DevID was read
using the periph_spi test program)
* xtimer is working (it's the same code as in samr21)

boards/sodaq-autonomo: Disable the "big" unittests because it does not fit
This commit is contained in:
Kees Bakker 2016-09-07 21:57:09 +02:00
parent 6aa346fbad
commit 076d5bda11
12 changed files with 459 additions and 2 deletions

View File

@ -0,0 +1,3 @@
MODULE = board
include $(RIOTBASE)/Makefile.base

View File

@ -0,0 +1,3 @@
ifneq (,$(filter saul_default,$(USEMODULE)))
USEMODULE += saul_gpio
endif

View File

@ -0,0 +1,16 @@
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
# Various other features (if any)
FEATURES_PROVIDED += cpp
# The board MPU family (used for grouping by the CI system)
FEATURES_MCU_GROUP = cortex_m0_2

View File

@ -0,0 +1,31 @@
# define the cpu used by SODAQ Autonomo board
export CPU = samd21
export CPU_MODEL = samd21j18a
CFLAGS += -D__SAMD21J18A__
# set default port depending on operating system
PORT_LINUX ?= /dev/ttyACM0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
export OFLAGS = -O binary
# setup the boards dependencies
include $(RIOTBOARD)/$(BOARD)/Makefile.dep
# setup serial terminal
include $(RIOTBOARD)/Makefile.include.serial
# Add board selector (USB serial) to OpenOCD options if specified.
# Use /dist/tools/usb-serial/list-ttys.sh to find out serial number.
# Usage: SERIAL="AAA..." BOARD="sodaq-autonomo" make flash
ifneq (,$(SERIAL))
export OPENOCD_EXTRA_INIT += "-c cmsis_dap_serial $(SERIAL)"
SERIAL_TTY = $(shell $(RIOTBASE)/dist/tools/usb-serial/find-tty.sh $(SERIAL))
ifeq (,$(SERIAL_TTY))
$(error Did not find a device with serial $(SERIAL))
endif
PORT_LINUX := $(SERIAL_TTY)
endif
# this board uses openocd
include $(RIOTBOARD)/Makefile.include.openocd

View File

@ -0,0 +1,32 @@
/*
* Copyright (C) 2016 Kees Bakker, SODAQ
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_sodaq-autonomo
* @{
*
* @file
* @brief Board specific implementations for the SODAQ Autonomo
* Pro board
*
* @author Kees Bakker <kees@sodaq.com>
*
* @}
*/
#include "board.h"
#include "periph/gpio.h"
void board_init(void)
{
/* initialize the on-board LED */
gpio_init(LED0_PIN, GPIO_OUT);
/* initialize the CPU */
cpu_init();
}

View File

@ -0,0 +1 @@
source [find board/sodaq_autonomo.cfg]

View File

@ -0,0 +1,64 @@
/*
* Copyright (C) 2016 Kees Bakker, SODAQ
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @defgroup boards_sodaq-autonomo SODAQ Autonomo
* @ingroup boards
* @brief Support for the SODAQ Autonomo board.
* @{
*
* @file
* @brief Board specific definitions for the SODAQ Autonomo board
*
* @author Kees Bakker <kees@sodaq.com>
*/
#ifndef BOARD_H_
#define BOARD_H_
#include "cpu.h"
#include "periph_conf.h"
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief xtimer configuration
* @{
*/
#define XTIMER TIMER_1
#define XTIMER_CHAN (0)
/** @} */
/**
* @brief LED pin definitions and handlers
* @{
*/
#define LED0_PIN GPIO_PIN(PA, 18)
#define LED_PORT PORT->Group[PA]
#define LED0_MASK (1 << 18)
#define LED0_ON (LED_PORT.OUTSET.reg = LED0_MASK)
#define LED0_OFF (LED_PORT.OUTCLR.reg = LED0_MASK)
#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK)
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */
/** @} */

View File

@ -0,0 +1,46 @@
/*
* Copyright (C) 2016 Kees Bakker, SODAQ
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_sodaq-autonomo
* @{
*
* @file
* @brief Board specific configuration of direct mapped GPIOs
*
* @author Kees Bakker <kees@sodaq.com>
*/
#ifndef GPIO_PARAMS_H
#define GPIO_PARAMS_H
#include "board.h"
#include "saul/periph.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief GPIO pin configuration
*/
static const saul_gpio_params_t saul_gpio_params[] =
{
{
.name = "LED(green)",
.pin = LED0_PIN,
.mode = GPIO_OUT
},
};
#ifdef __cplusplus
}
#endif
#endif /* GPIO_PARAMS_H */
/** @} */

View File

@ -0,0 +1,232 @@
/*
* Copyright (C) 2016 Kees Bakker, SODAQ
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_sodaq-autonomo
* @{
*
* @file
* @brief Configuration of CPU peripherals for the SODAQ Autonomo board
*
* @author Kees Bakker <kees@sodaq.com>
*/
#ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_
#include <stdint.h>
#include "cpu.h"
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief External oscillator and clock configuration
*
* For selection of the used CORECLOCK, we have implemented two choices:
*
* - usage of the PLL fed by the internal 8MHz oscillator divided by 8
* - usage of the internal 8MHz oscillator directly, divided by N if needed
*
*
* The PLL option allows for the usage of a wider frequency range and a more
* stable clock with less jitter. This is why we use this option as default.
*
* The target frequency is computed from the PLL multiplier and the PLL divisor.
* Use the following formula to compute your values:
*
* CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
*
* NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL
* frequency is 96MHz. So PLL_MULL must be between 31 and 95!
*
*
* The internal Oscillator used directly can lead to a slightly better power
* efficiency to the cost of a less stable clock. Use this option when you know
* what you are doing! The actual core frequency is adjusted as follows:
*
* CORECLOCK = 8MHz / DIV
*
* NOTE: A core clock frequency below 1MHz is not recommended
*
* @{
*/
#define CLOCK_USE_PLL (1)
#if CLOCK_USE_PLL
/* edit these values to adjust the PLL output frequency */
#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
/* generate the actual used core clock frequency */
#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
#else
/* edit this value to your needs */
#define CLOCK_DIV (1U)
/* generate the actual core clock frequency */
#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
#endif
/** @} */
/**
* @name Timer peripheral configuration
* @{
*/
#define TIMER_NUMOF (2U)
#define TIMER_0_EN 1
#define TIMER_1_EN 1
/* Timer 0 configuration */
#define TIMER_0_DEV TC3->COUNT16
#define TIMER_0_CHANNELS 2
#define TIMER_0_MAX_VALUE (0xffff)
#define TIMER_0_ISR isr_tc3
/* Timer 1 configuration */
#define TIMER_1_DEV TC4->COUNT32
#define TIMER_1_CHANNELS 2
#define TIMER_1_MAX_VALUE (0xffffffff)
#define TIMER_1_ISR isr_tc4
/** @} */
/**
* @name UART configuration
* @{
* See Table 6.1 of the SAM D21 Datasheet
*/
static const uart_conf_t uart_config[] = {
/* device, RX pin, TX pin, mux, RX pad, TX pad */
{&SERCOM0->USART, GPIO_PIN(PA,9), GPIO_PIN(PA,10), GPIO_MUX_C, SERCOM_RX_PAD_1, UART_TX_PAD_2},
{&SERCOM5->USART, GPIO_PIN(PB,31), GPIO_PIN(PB,30), GPIO_MUX_D, SERCOM_RX_PAD_1, UART_TX_RTS_CTS_PAD_0_2_3},
{&SERCOM4->USART, GPIO_PIN(PB,13), GPIO_PIN(PA,14), GPIO_MUX_C, SERCOM_RX_PAD_1, UART_TX_PAD_2},
{&SERCOM1->USART, GPIO_PIN(PA,17), GPIO_PIN(PA,18), GPIO_MUX_C, SERCOM_RX_PAD_1, UART_TX_PAD_2},
};
/* interrupt function name mapping */
#define UART_0_ISR isr_sercom0
#define UART_1_ISR isr_sercom5
#define UART_2_ISR isr_sercom4
#define UART_3_ISR isr_sercom1
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @name PWM configuration
* @{
*/
#define PWM_0_EN 1
#define PWM_1_EN 1
#define PWM_MAX_CHANNELS 3
/* for compatibility with test application */
#define PWM_0_CHANNELS PWM_MAX_CHANNELS
#define PWM_1_CHANNELS PWM_MAX_CHANNELS
/* PWM device configuration */
static const pwm_conf_t pwm_config[] = {
#if PWM_0_EN
{TCC1, {
/* GPIO pin, MUX value, TCC channel */
{ GPIO_PIN(PA, 6), GPIO_MUX_E, 0 },
{ GPIO_PIN(PA, 7), GPIO_MUX_E, 1 },
{ GPIO_UNDEF, (gpio_mux_t)0, 2 }
}},
#endif
#if PWM_1_EN
{TCC0, {
/* GPIO pin, MUX value, TCC channel */
{ GPIO_PIN(PA, 16), GPIO_MUX_F, 0 },
{ GPIO_PIN(PA, 18), GPIO_MUX_F, 2 },
{ GPIO_PIN(PA, 19), GPIO_MUX_F, 3 }
}}
#endif
};
/* number of devices that are actually defined */
#define PWM_NUMOF (2U)
/** @} */
/**
* @name SPI configuration
* @{
*/
#define SPI_NUMOF (1)
#define SPI_0_EN 1
#define SPI_1_EN 0
/* SPI0 */
#define SPI_0_DEV SERCOM3->SPI
#define SPI_IRQ_0 SERCOM3_IRQn
#define SPI_0_GCLK_ID SERCOM3_GCLK_ID_CORE
/* SPI 0 pin configuration */
#define SPI_0_SCLK GPIO_PIN(PA, 21)
#define SPI_0_SCLK_MUX GPIO_MUX_D
#define SPI_0_MISO GPIO_PIN(PA, 22)
#define SPI_0_MISO_MUX GPIO_MUX_C
#define SPI_0_MISO_PAD SERCOM_RX_PAD_0
#define SPI_0_MOSI GPIO_PIN(PA, 20)
#define SPI_0_MOSI_MUX GPIO_MUX_D
#define SPI_0_MOSI_PAD SPI_PAD_2_SCK_3
// How/where do we define SS?
#define SPI_0_SS GPIO_PIN(PA, 23)
/** @} */
/**
* @name I2C configuration
* @{
*/
#define I2C_NUMOF (1U)
#define I2C_0_EN 1
#define I2C_1_EN 0
#define I2C_2_EN 0
#define I2C_3_EN 0
#define I2C_IRQ_PRIO 1
#define I2C_0_DEV SERCOM2->I2CM
#define I2C_0_IRQ SERCOM2_IRQn
#define I2C_0_ISR isr_sercom2
/* I2C 0 GCLK */
#define I2C_0_GCLK_ID SERCOM2_GCLK_ID_CORE
#define I2C_0_GCLK_ID_SLOW SERCOM2_GCLK_ID_SLOW
/* I2C 0 pin configuration */
#define I2C_0_SDA GPIO_PIN(PA, 12)
#define I2C_0_SCL GPIO_PIN(PA, 13)
#define I2C_0_MUX GPIO_MUX_C
/**
* @name RTC configuration
* @{
*/
#define RTC_NUMOF (1U)
#define RTC_DEV RTC->MODE2
/** @} */
/**
* @name RTT configuration
* @{
*/
#define RTT_NUMOF (1U)
#define RTT_DEV RTC->MODE0
#define RTT_IRQ RTC_IRQn
#define RTT_IRQ_PRIO 10
#define RTT_ISR isr_rtc
#define RTT_MAX_VALUE (0xffffffff)
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H_ */
/** @} */

View File

@ -27,6 +27,8 @@ extern "C" {
#include "cmsis/samr21/include/samr21g18a.h"
#elif defined(__SAMR21E18A__) || defined(__ATSAMR21E18A__)
#include "cmsis/samr21/include/samr21e18a.h"
#elif defined(__SAMD21J18A__) || defined(__ATSAMD21J18A__)
#include "cmsis/samd21/include/samd21j18a.h"
#else
#error "Unsupported SAM0 variant."
#endif

View File

@ -0,0 +1,27 @@
/*
* Copyright (C) 2015, 2016 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_samd21
* @{
*
* @file
* @brief Memory definitions for the SAMD21J18A
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 256K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
}
INCLUDE cortexm_base.ld

View File

@ -7,7 +7,7 @@ BOARD_INSUFFICIENT_MEMORY := airfy-beacon cc2650stk chronos msb-430 msb-430h pca
nucleo-f334 yunjia-nrf51822 samr21-xpro \
arduino-mega2560 airfy-beacon nrf51dongle nrf6310 \
weio waspmote-pro nucleo-f072 arduino-uno \
arduino-duemilanove
arduino-duemilanove sodaq-autonomo
USEMODULE += embunit
@ -25,7 +25,7 @@ ARM_CORTEX_M_BOARDS := airfy-beacon arduino-due cc2538dk ek-lm4f120xl f4vi1 fox
nucleo-f091 nucleo-f303 nucleo-f334 nucleo-f401 nucleo-l1 openmote-cc2538 \
pba-d-01-kw2x pca10000 pca10005 remote saml21-xpro samr21-xpro slwstk6220a \
spark-core stm32f0discovery stm32f3discovery stm32f4discovery udoo weio \
yunjia-nrf51822
yunjia-nrf51822 sodaq-autonomo
DISABLE_TEST_FOR_ARM_CORTEX_M := tests-relic
AVR_BOARDS := arduino-mega2560 waspmote-pro arduino-uno arduino-duemilanove