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Merge pull request #9996 from haukepetersen/fix_gpioirq_sam0_common

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cpu/sam0_common/gpio: use gpio_irq feature
This commit is contained in:
Dylan Laduranty 2018-09-23 12:14:11 +02:00 committed by GitHub
commit 028bc2a3e4
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 56 additions and 52 deletions
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108
cpu/sam0_common/periph/gpio.c
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@ -31,17 +31,19 @@
#define ENABLE_DEBUG (0)
#include "debug.h"
/**
* @brief Number of external interrupt lines
*/
#define NUMOF_IRQS (16U)
/**
* @brief Mask to get PINCFG reg value from mode value
*/
#define MODE_PINCFG_MASK (0x06)
#ifdef MODULE_PERIPH_GPIO_IRQ
/**
* @brief Number of external interrupt lines
*/
#define NUMOF_IRQS (16U)
static gpio_isr_ctx_t gpio_config[NUMOF_IRQS];
#endif
static inline PortGroup *_port(gpio_t pin)
{
@ -58,16 +60,6 @@ static inline int _pin_mask(gpio_t pin)
return (1 << _pin_pos(pin));
}
static int _exti(gpio_t pin)
{
int port_num = ((pin >> 7) & 0x03);
if (port_num > 1) {
return -1;
}
return exti_config[port_num][_pin_pos(pin)];
}
void gpio_init_mux(gpio_t pin, gpio_mux_t mux)
{
PortGroup* port = _port(pin);
@ -111,6 +103,54 @@ int gpio_init(gpio_t pin, gpio_mode_t mode)
return 0;
}
int gpio_read(gpio_t pin)
{
PortGroup *port = _port(pin);
int mask = _pin_mask(pin);
if (port->DIR.reg & mask) {
return (port->OUT.reg & mask) ? 1 : 0;
}
else {
return (port->IN.reg & mask) ? 1 : 0;
}
}
void gpio_set(gpio_t pin)
{
_port(pin)->OUTSET.reg = _pin_mask(pin);
}
void gpio_clear(gpio_t pin)
{
_port(pin)->OUTCLR.reg = _pin_mask(pin);
}
void gpio_toggle(gpio_t pin)
{
_port(pin)->OUTTGL.reg = _pin_mask(pin);
}
void gpio_write(gpio_t pin, int value)
{
if (value) {
_port(pin)->OUTSET.reg = _pin_mask(pin);
} else {
_port(pin)->OUTCLR.reg = _pin_mask(pin);
}
}
#ifdef MODULE_PERIPH_GPIO_IRQ
static int _exti(gpio_t pin)
{
int port_num = ((pin >> 7) & 0x03);
if (port_num > 1) {
return -1;
}
return exti_config[port_num][_pin_pos(pin)];
}
int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
gpio_cb_t cb, void *arg)
{
@ -183,43 +223,6 @@ void gpio_irq_disable(gpio_t pin)
EIC->INTENCLR.reg = (1 << exti);
}
int gpio_read(gpio_t pin)
{
PortGroup *port = _port(pin);
int mask = _pin_mask(pin);
if (port->DIR.reg & mask) {
return (port->OUT.reg & mask) ? 1 : 0;
}
else {
return (port->IN.reg & mask) ? 1 : 0;
}
}
void gpio_set(gpio_t pin)
{
_port(pin)->OUTSET.reg = _pin_mask(pin);
}
void gpio_clear(gpio_t pin)
{
_port(pin)->OUTCLR.reg = _pin_mask(pin);
}
void gpio_toggle(gpio_t pin)
{
_port(pin)->OUTTGL.reg = _pin_mask(pin);
}
void gpio_write(gpio_t pin, int value)
{
if (value) {
_port(pin)->OUTSET.reg = _pin_mask(pin);
} else {
_port(pin)->OUTCLR.reg = _pin_mask(pin);
}
}
void isr_eic(void)
{
for (unsigned i = 0; i < NUMOF_IRQS; i++) {
@ -230,3 +233,4 @@ void isr_eic(void)
}
cortexm_isr_end();
}
#endif