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RIOT/makefiles/stdio.inc.mk

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Makefile.dep: use stdio.inc.mk Move all stdio dependencies to its own makefile
2020-03-18 13:31:01 +01:00
STDIO_MODULES = \
slipdev_stdio \
stdio_cdc_acm \
stdio_ethos \
stdio_null \
stdio_rtt \
stdio_semihosting: Initial include of Semihosting-based STDIO
2020-02-09 12:52:20 +01:00
stdio_semihosting \
Makefile.dep: use stdio.inc.mk Move all stdio dependencies to its own makefile
2020-03-18 13:31:01 +01:00
stdio_uart \
#
picolibc: Provide integration into the build system [v3] Support for picolibc as alternative libc implementation is added with this commit. For now only cortex-m CPU's are supported. Enable via PICOLIBC=1 --- v2: squash fixes in v3: Remove picolibc integer printf/scanf stuff from sys/Makefile.include, it gets set in makefiles/libc/picolibc.mk fixup for dependency
2019-09-25 22:13:08 +02:00
ifneq (,$(filter newlib picolibc,$(USEMODULE)))
Makefile.dep: use stdio.inc.mk Move all stdio dependencies to its own makefile
2020-03-18 13:31:01 +01:00
ifeq (,$(filter $(STDIO_MODULES),$(USEMODULE)))
USEMODULE += stdio_uart
endif
endif
ifneq (,$(filter stdio_cdc_acm,$(USEMODULE)))
USEMODULE += usbus_cdc_acm
USEMODULE += isrpipe
endif
ifneq (,$(filter stdio_rtt,$(USEMODULE)))
USEMODULE += xtimer
endif
ifneq (,$(filter stdio_ethos,$(USEMODULE)))
USEMODULE += ethos
USEMODULE += stdin
USEMODULE += stdio_uart
endif
ifneq (,$(filter stdin,$(USEMODULE)))
ifneq (,$(filter stdio_uart,$(USEMODULE)))
USEMODULE += stdio_uart_rx
endif
endif
ifneq (,$(filter stdio_uart_rx,$(USEMODULE)))
USEMODULE += isrpipe
USEMODULE += stdio_uart
endif
ifneq (,$(filter stdio_uart,$(USEMODULE)))
FEATURES_REQUIRED += periph_uart
endif
stdio_semihosting: Initial include of Semihosting-based STDIO
2020-02-09 12:52:20 +01:00
ifneq (,$(filter stdio_semihosting,$(USEMODULE)))
USEMODULE += xtimer
stdio_semihosting: Extend with RISC-V support RISC-V support semihosting in very similar way as the cortex-m microcontrollers. The code calls a breakpoint instruction and the attached debugger reads/writes registers and memory for stdio. The RISC-V architecture doesn't support a call number with the EBREAK instruction, to allow the debugger to detect a semihosting break point, the EBREAK instruction is wrapped in a SLLI and SRAI instruction. These use x0 as output register, making them NOP instructions. One caveat when using this is that the RISC-V core traps the EBREAK instruction with trap code 3 when no debugger is attached. Restarting the application with the debugger attached avoids this.
2020-09-09 11:32:30 +02:00
FEATURES_REQUIRED_ANY += cpu_core_cortexm|arch_riscv
stdio_semihosting: Initial include of Semihosting-based STDIO
2020-02-09 12:52:20 +01:00
endif
makefiles/stdio: enable stdout buffering for CDC ACM, ethos, semihosting CDC ACM, ethos, Semihosting and SLIP all benefit from sending data out in larger chunks and will benefit from stdout buffering. `stdio_rtt` does have an internal TX buffer, so we don't need to do any buffering on top. With plain UART there was a slight advantage *without* buffering when testing with `tests/periph_uart_nonblocking` (with the non-blocking feature disabled). Since the removal of the buffering saves us some RAM and ROM, disable it by default there. This will be different with DMA enabled UARTs.
2020-09-01 12:04:26 +02:00
# enable stdout buffering for modules that benefit from sending out buffers in larger chunks
ifneq (,$(filter picolibc,$(USEMODULE)))
ifneq (,$(filter stdio_cdc_acm stdio_ethos slipdev_stdio stdio_semihosting,$(USEMODULE)))
USEMODULE += picolibc_stdout_buffered
endif
endif
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