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RIOT/makefiles/arch/riscv.inc.mk

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cpu/fe310: add RISC-V cpu FE310 New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools
2018-04-16 19:03:33 +02:00
# Target architecture for the build.
build system: use riscv-none-elf as triplet Use riscv-none-elf instead of legacy riscv-none-embed as target triplet for RISC-V development. However, if ricsv-none-elf is not present, try riscv64-unknown-elf and riscv-none-embed instead. If the legacy riscv-none-embed is used, a warning is printed.
2020-09-07 22:21:42 +02:00
TARGET_ARCH_RISCV ?= riscv-none-elf
# If TARGET_ARCH wasn't set by user, also check if riscv64-unknown-elf
# or riscv-none-embed is present.
ifeq (riscv-none-elf,$(TARGET_ARCH_RISCV))
ifeq (,$(shell which $(TARGET_ARCH_RISCV)-gcc))
ifneq (,$(shell which riscv64-unknown-elf-gcc))
TARGET_ARCH_RISCV := riscv64-unknown-elf
else ifneq (,$(shell which riscv-none-embed-gcc))
$(info Falling back to legacy riscv-none-embed toolchain)
TARGET_ARCH_RISCV := riscv-none-embed
endif
endif
endif
build system: Overwrite TARGET_ARCH per arch Add `TARGET_ARCH_<ARCH>` for each architecture (e.g. `TARGET_ARCH_CORTEX` for Cortex M) to allow users to overwrite the target triple for a specific arch from ~/.profile or ~/.bashrc (or the like) without overwriting it for all others as well.
2020-09-08 22:28:41 +02:00
TARGET_ARCH ?= $(TARGET_ARCH_RISCV)
cpu/fe310: add RISC-V cpu FE310 New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools
2018-04-16 19:03:33 +02:00
# define build specific options
CFLAGS_CPU = -march=rv32imac -mabi=ilp32 -mcmodel=medlow -msmall-data-limit=8
CFLAGS_LINK = -nostartfiles -ffunction-sections -fdata-sections
cpu/fe310: change default optimization to "-Os" Also moves the option to CFLAGS_OPT.
2019-10-21 11:27:21 +02:00
CFLAGS_DBG ?= -g3
CFLAGS_OPT ?= -Os
cpu/fe310: add RISC-V cpu FE310 New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools
2018-04-16 19:03:33 +02:00
make/riscv: remove use of export for LINKFLAGS
2020-01-02 09:51:20 +01:00
LINKFLAGS += -L$(RIOTCPU)/$(CPU)/ldscripts
LINKER_SCRIPT ?= $(CPU_MODEL).ld
LINKFLAGS += -T$(LINKER_SCRIPT)
cpu/fe310: add RISC-V cpu FE310 New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools
2018-04-16 19:03:33 +02:00
makefiles: do not locally export compilation variables These are already exported by `makefiles/vars.inc.mk`. It is a prerequisite to allow handling compilation without global exports.
2019-08-27 16:06:41 +02:00
CFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG) $(CFLAGS_OPT) $(CFLAGS_LINK)
ASFLAGS += $(CFLAGS_CPU) $(CFLAGS_DBG)
cpu/fe310: add RISC-V cpu FE310 New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools
2018-04-16 19:03:33 +02:00
# export linker flags
make/riscv: remove use of export for LINKFLAGS
2020-01-02 09:51:20 +01:00
LINKFLAGS += $(CFLAGS_CPU) $(CFLAGS_LINK) $(CFLAGS_DBG) $(CFLAGS_OPT) -Wl,--gc-sections -static -lgcc
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