2014-04-17 19:39:36 +02:00
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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2015-05-21 13:19:41 +02:00
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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2014-04-17 19:39:36 +02:00
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*/
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/**
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2015-05-21 13:19:41 +02:00
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* @ingroup boards_stm32f4discovery
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2014-04-17 19:39:36 +02:00
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* @{
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*
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* @file
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2015-05-21 13:19:41 +02:00
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* @name Peripheral MCU configuration for the STM32F4discovery board
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2014-04-17 19:39:36 +02:00
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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2014-08-05 10:24:01 +02:00
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* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de>
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2014-04-17 19:39:36 +02:00
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*/
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2017-01-18 13:00:05 +01:00
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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2014-04-17 19:39:36 +02:00
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2020-09-04 08:11:58 +02:00
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/* This board provides an HSE */
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#ifndef CONFIG_BOARD_HAS_HSE
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#define CONFIG_BOARD_HAS_HSE 1
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#endif
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2015-10-20 12:41:48 +02:00
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#include "periph_cpu.h"
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2020-10-22 08:51:13 +02:00
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#include "clk_conf.h"
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2019-10-24 16:52:05 +02:00
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#include "cfg_usb_otg_fs.h"
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2015-10-20 12:41:48 +02:00
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2014-10-13 15:25:50 +02:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2020-05-15 23:11:33 +02:00
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/**
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* @name DMA streams configuration
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* @{
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*/
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static const dma_conf_t dma_config[] = {
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{ .stream = 11 }, /* DMA2 Stream 3 - SPI1_TX */
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{ .stream = 10 }, /* DMA2 Stream 2 - SPI1_RX */
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{ .stream = 4 }, /* DMA1 Stream 4 - SPI2_TX */
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{ .stream = 3 }, /* DMA1 Stream 3 - SPI2_RX */
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};
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#define DMA_0_ISR isr_dma2_stream3
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#define DMA_1_ISR isr_dma2_stream2
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#define DMA_2_ISR isr_dma1_stream4
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#define DMA_3_ISR isr_dma1_stream3
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#define DMA_NUMOF ARRAY_SIZE(dma_config)
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/** @} */
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2014-04-17 19:39:36 +02:00
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/**
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2017-01-26 18:14:32 +01:00
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* @name Timer configuration
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2014-04-17 19:39:36 +02:00
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* @{
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*/
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2016-12-07 12:56:24 +01:00
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static const timer_conf_t timer_config[] = {
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{
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.dev = TIM2,
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.max = 0xffffffff,
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.rcc_mask = RCC_APB1ENR_TIM2EN,
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.bus = APB1,
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.irqn = TIM2_IRQn
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},
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{
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.dev = TIM5,
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.max = 0xffffffff,
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.rcc_mask = RCC_APB1ENR_TIM5EN,
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.bus = APB1,
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.irqn = TIM5_IRQn
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}
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};
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2014-04-17 19:39:36 +02:00
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#define TIMER_0_ISR isr_tim2
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#define TIMER_1_ISR isr_tim5
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2016-12-07 12:56:24 +01:00
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2019-07-18 15:14:29 +02:00
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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2014-04-17 19:39:36 +02:00
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/** @} */
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/**
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2017-01-26 18:14:32 +01:00
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* @name UART configuration
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2014-04-17 19:39:36 +02:00
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* @{
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*/
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2015-10-20 12:41:48 +02:00
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static const uart_conf_t uart_config[] = {
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{
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2016-03-16 12:16:32 +01:00
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.dev = USART2,
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.rcc_mask = RCC_APB1ENR_USART2EN,
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2016-12-07 17:03:52 +01:00
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.rx_pin = GPIO_PIN(PORT_A, 3),
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.tx_pin = GPIO_PIN(PORT_A, 2),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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2016-03-16 12:16:32 +01:00
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.bus = APB1,
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.irqn = USART2_IRQn,
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2020-05-15 16:16:07 +02:00
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#ifdef MODULE_PERIPH_DMA
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.dma = DMA_STREAM_UNDEF,
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.dma_chan = UINT8_MAX,
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2016-12-07 17:03:52 +01:00
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#endif
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2015-10-20 12:41:48 +02:00
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},
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{
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2016-03-16 12:16:32 +01:00
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.dev = USART3,
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.rcc_mask = RCC_APB1ENR_USART3EN,
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2016-12-07 17:03:52 +01:00
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.rx_pin = GPIO_PIN(PORT_D, 9),
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.tx_pin = GPIO_PIN(PORT_D, 8),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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2016-03-16 12:16:32 +01:00
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.bus = APB1,
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.irqn = USART3_IRQn,
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2020-05-15 16:16:07 +02:00
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#ifdef MODULE_PERIPH_DMA
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.dma = DMA_STREAM_UNDEF,
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.dma_chan = UINT8_MAX,
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2016-12-07 17:03:52 +01:00
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#endif
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2016-12-07 12:56:24 +01:00
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}
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2015-10-20 12:41:48 +02:00
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};
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2015-06-03 18:27:05 +02:00
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2016-12-07 17:03:52 +01:00
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#define UART_0_ISR (isr_usart2)
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#define UART_1_ISR (isr_usart3)
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2015-10-20 12:41:48 +02:00
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2019-07-18 15:14:29 +02:00
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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2014-04-17 19:39:36 +02:00
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/** @} */
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/**
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2017-01-26 18:14:32 +01:00
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* @name ADC configuration
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2015-12-07 21:32:28 +01:00
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*
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* We need to define the following fields:
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* PIN, device (ADCx), channel
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2014-04-17 19:39:36 +02:00
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* @{
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*/
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2020-08-25 16:14:22 +02:00
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static const adc_conf_t adc_config[] = {
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{GPIO_PIN(PORT_A, 1), 0, 1},
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{GPIO_PIN(PORT_A, 4), 0, 4},
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{GPIO_PIN(PORT_C, 1), 1, 11},
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2021-10-07 21:19:04 +02:00
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{GPIO_PIN(PORT_C, 2), 1, 12},
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{GPIO_UNDEF, 0, 18}, /* VBAT */
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2020-08-25 16:14:22 +02:00
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};
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2021-10-07 21:19:04 +02:00
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#define VBAT_ADC ADC_LINE(4) /**< VBAT ADC line */
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2020-08-25 16:14:22 +02:00
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#define ADC_NUMOF ARRAY_SIZE(adc_config)
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2014-04-17 19:39:36 +02:00
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/** @} */
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2014-11-16 22:31:59 +01:00
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/**
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2017-01-26 18:14:32 +01:00
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* @name DAC configuration
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2014-11-16 22:31:59 +01:00
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* @{
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*/
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2017-06-27 12:45:50 +02:00
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static const dac_conf_t dac_config[] = {
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{ .pin = GPIO_PIN(PORT_A, 4), .chan = 0 },
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{ .pin = GPIO_PIN(PORT_A, 5), .chan = 1 }
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};
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2015-12-08 01:14:16 +01:00
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2019-07-18 15:14:29 +02:00
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#define DAC_NUMOF ARRAY_SIZE(dac_config)
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2015-12-08 01:14:16 +01:00
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/** @} */
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2014-11-16 22:31:59 +01:00
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2014-04-17 19:39:36 +02:00
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/**
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2017-02-16 17:59:21 +01:00
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* @name PWM configuration
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2014-04-17 19:39:36 +02:00
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* @{
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*/
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2016-12-07 14:58:28 +01:00
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static const pwm_conf_t pwm_config[] = {
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{
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.dev = TIM1,
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.rcc_mask = RCC_APB2ENR_TIM1EN,
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2017-01-17 14:08:39 +01:00
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.chan = { { .pin = GPIO_PIN(PORT_E, 9), .cc_chan = 0 },
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{ .pin = GPIO_PIN(PORT_E, 11), .cc_chan = 1 },
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{ .pin = GPIO_PIN(PORT_E, 11), .cc_chan = 2 },
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{ .pin = GPIO_PIN(PORT_E, 14), .cc_chan = 3 } },
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2016-12-07 14:58:28 +01:00
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.af = GPIO_AF1,
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.bus = APB2
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},
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2017-01-18 09:38:50 +01:00
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{
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.dev = TIM3,
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.rcc_mask = RCC_APB1ENR_TIM3EN,
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.chan = { { .pin = GPIO_PIN(PORT_B, 4), .cc_chan = 0 },
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{ .pin = GPIO_PIN(PORT_B, 5), .cc_chan = 1 },
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{ .pin = GPIO_PIN(PORT_B, 0), .cc_chan = 2 },
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{ .pin = GPIO_PIN(PORT_B, 1), .cc_chan = 3 } },
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.af = GPIO_AF2,
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.bus = APB1
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}
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2016-12-07 14:58:28 +01:00
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};
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2019-07-18 15:14:29 +02:00
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#define PWM_NUMOF ARRAY_SIZE(pwm_config)
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2014-04-17 19:39:36 +02:00
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/** @} */
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/**
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2017-01-26 18:14:32 +01:00
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* @name SPI configuration
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2014-04-17 19:39:36 +02:00
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* @{
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*/
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2016-11-08 18:28:32 +01:00
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static const spi_conf_t spi_config[] = {
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{
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2020-05-15 23:11:33 +02:00
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_A, 7),
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.miso_pin = GPIO_PIN(PORT_A, 6),
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.sclk_pin = GPIO_PIN(PORT_A, 5),
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.cs_pin = GPIO_PIN(PORT_A, 4),
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB2ENR_SPI1EN,
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.apbbus = APB2,
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#ifdef MODULE_PERIPH_DMA
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.tx_dma = 0,
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.tx_dma_chan = 3,
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.rx_dma = 1,
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.rx_dma_chan = 3,
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#endif
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2016-11-08 18:28:32 +01:00
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},
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{
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2020-05-15 23:11:33 +02:00
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.dev = SPI2,
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.mosi_pin = GPIO_PIN(PORT_B, 15),
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.miso_pin = GPIO_PIN(PORT_B, 14),
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.sclk_pin = GPIO_PIN(PORT_B, 13),
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.cs_pin = GPIO_PIN(PORT_B, 12),
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB1ENR_SPI2EN,
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.apbbus = APB1,
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#ifdef MODULE_PERIPH_DMA
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.tx_dma = 2,
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.tx_dma_chan = 0,
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.rx_dma = 3,
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.rx_dma_chan = 0,
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#endif
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},
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2016-11-08 18:28:32 +01:00
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};
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2014-04-17 19:39:36 +02:00
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2019-07-18 15:14:29 +02:00
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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2014-04-17 19:39:36 +02:00
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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2018-05-31 15:57:31 +02:00
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = I2C1,
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PORT_B, 6),
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2018-11-21 09:29:05 +01:00
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.sda_pin = GPIO_PIN(PORT_B, 9),
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2018-05-31 15:57:31 +02:00
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.scl_af = GPIO_AF4,
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.sda_af = GPIO_AF4,
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.bus = APB1,
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.rcc_mask = RCC_APB1ENR_I2C1EN,
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.clk = CLOCK_APB1,
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.irqn = I2C1_EV_IRQn
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}
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};
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#define I2C_0_ISR isr_i2c1_ev
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2019-07-18 15:14:29 +02:00
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#define I2C_NUMOF ARRAY_SIZE(i2c_config)
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2014-04-17 19:39:36 +02:00
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/** @} */
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2014-10-13 15:25:50 +02:00
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#ifdef __cplusplus
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}
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#endif
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2017-01-18 13:00:05 +01:00
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#endif /* PERIPH_CONF_H */
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2014-04-17 19:39:36 +02:00
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/** @} */
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