RIOT/cpu/stm32/kconfigs/f0/Kconfig

# Copyright (c) 2020 Inria
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
#

config CPU_FAM
    default "f0" if CPU_FAM_F0

config CPU_FAM_F0
    bool
    select CPU_STM32
    select CPU_CORE_CORTEX_M0
    select HAS_CPU_STM32F0
    select HAS_PERIPH_FLASHPAGE
    select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
    select HAS_PERIPH_FLASHPAGE_PAGEWISE
    select HAS_PERIPH_FLASHPAGE_RAW
    select HAS_PERIPH_GPIO_LL
    select HAS_PERIPH_GPIO_LL_IRQ
    select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH
    select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW
    select HAS_PERIPH_WDT
    select HAS_BOOTLOADER_STM32

config HAS_CPU_STM32F0
    bool
    help
        Indicates that the cpu being used belongs to the 'stm32f0' family.
cpu/stm32: reorganize Kconfig files per families 2020-09-11 08:32:37 +02:00			`# Copyright (c) 2020 Inria`
			`#`
			`# This file is subject to the terms and conditions of the GNU Lesser`
			`# General Public License v2.1. See the file LICENSE in the top level`
			`# directory for more details.`
			`#`

			`config CPU_FAM`
			`default "f0" if CPU_FAM_F0`

			`config CPU_FAM_F0`
			`bool`
			`select CPU_STM32`
			`select CPU_CORE_CORTEX_M0`
			`select HAS_CPU_STM32F0`
			`select HAS_PERIPH_FLASHPAGE`
periph/flashpage: Add _in_address_space feature 2022-03-17 19:45:54 +01:00			`select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE`
stm32: Adapt to flashpage/flashpage_pagewise API 2020-11-09 16:45:22 +01:00			`select HAS_PERIPH_FLASHPAGE_PAGEWISE`
cpu/stm32: do not build bootloader for mp1 The stm32mp1 family has no flash. The firmware is loaded directly in RAM by stlink programmer or by Cortex-A7 bootloader/OS. Thus bootloader is useless for this family, disable it. Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com> 2020-08-03 00:31:59 +02:00			`select HAS_PERIPH_FLASHPAGE_RAW`
cpu/stm32: Implement periph/gpio_ll{,_irq} except for STM32F1 Co-authored-by: Gunar Schorcht <gunar@schorcht.net> Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr> 2021-08-27 22:59:43 +02:00			`select HAS_PERIPH_GPIO_LL`
			`select HAS_PERIPH_GPIO_LL_IRQ`
			`select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_HIGH`
			`select HAS_PERIPH_GPIO_LL_IRQ_LEVEL_TRIGGERED_LOW`
cpu/stm32: disable periph_wdt for mp1 family In STM32MP1 family, independant watchdogs (IWDG1 and IWDG2) are dedicated to the MPU (Cortex-A7). Thus simply disable the feature for STM32MP1 family. Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com> 2020-11-05 01:06:10 +01:00			`select HAS_PERIPH_WDT`
cpu/stm32: do not build bootloader for mp1 The stm32mp1 family has no flash. The firmware is loaded directly in RAM by stlink programmer or by Cortex-A7 bootloader/OS. Thus bootloader is useless for this family, disable it. Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com> 2020-08-03 00:31:59 +02:00			`select HAS_BOOTLOADER_STM32`
cpu/stm32: reorganize Kconfig files per families 2020-09-11 08:32:37 +02:00
			`config HAS_CPU_STM32F0`
			`bool`
			`help`
			`Indicates that the cpu being used belongs to the 'stm32f0' family.`