2014-07-31 19:59:02 +02:00
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/*
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* board_init.c - Implementation of functions to init board.
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* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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2013-05-25 12:34:18 +02:00
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2017-11-30 23:37:28 +01:00
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/**
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* @ingroup boards_common_wsn430
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* @{
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*
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* @file
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* @brief Board initialization for WSN430
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*
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* @author Milan Babel <babel@inf.fu-berlin.de>
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*
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* @}
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*/
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2013-05-25 12:34:18 +02:00
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#include "cpu.h"
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2015-09-02 17:06:12 +02:00
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#include "irq.h"
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2013-05-25 12:34:18 +02:00
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#include "board.h"
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#include "msp430.h"
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#include "debug.h"
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2015-09-22 04:39:39 +02:00
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#include "uart_stdio.h"
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2013-05-25 12:34:18 +02:00
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make: fix various compile errors with Wextra
pkg, nordic_softdevice_ble: disable CFLAGS to omit compiler error
sys, pm_layered: fix casting nonscalar to the same type
cpu, stm32_common: fix type-limits, remove always true assert
cpu, stm32f4: fix pointer arithmetic in periph/i2c
drivers, at86rf2xx: fix type-limits where condition always true
saul, gpio: fix if no gpio configured for saul
cpu, saml21: add frequency check to periph/timer
driver, cc110x: fix unused param and type-limts errors
boards, wsn430-common: fix old-style-declaration
make: fix old style definition
drivers, sdcard_spi: fix old style typedef
driver, at30tse: remove unnecessary check
driver, nrf24: fix type-limit
driver, pn532: change buffer from char to uint8_t
tests/driver_sdcard: fix type limits
boards, feather-m0: add missing field inits
driver, tcs37727: fix type limits
pkg, emb6: disable some compiler warnings
tests/emb6: disable some compiler warings
pkg, openthread: fix sign compare and unused params
tests/trickle: fix struct init
tests/pthread_cooperation: fix type limits
board, mips-malta: remove feature periph_uart
shell: fix var size for netif command
gnrc, netif: fix sign-compare
gnrc, nib: fix sign-compare
shell: fix output in netif command
posix: fix type-limits in pthread_cond
2017-10-31 11:52:18 +01:00
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static volatile uint32_t __msp430_cpu_speed = MSP430_INITIAL_CPU_SPEED;
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2013-05-25 12:34:18 +02:00
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2013-10-28 23:01:45 +01:00
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void msp430_init_dco(void);
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2013-05-25 12:34:18 +02:00
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typedef enum {
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MCLK_2MHZ_SCLK_1MHZ = 1000002uL,
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MCLK_4MHZ_SCLK_1MHZ = 1000004uL,
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MCLK_8MHZ_SCLK_1MHZ = 1000008uL,
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MCLK_8MHZ_SCLK_8MHZ = 8000000uL
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}speed_t;
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static void msb_ports_init(void)
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{
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// Port 1: GDO, Flash, BSL TX
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P1SEL = 0x02; // Port1 Select: 00000010 = 0x02
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P1OUT = 0x00; // Port1 Output: 00000000 = 0x00
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2013-05-28 10:10:45 +02:00
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P1DIR = 0x87; // Port1 Direction: 10000111 = 0x87
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2013-05-25 12:34:18 +02:00
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// Port 2: GPIO, BSL RX, 1wire
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P2SEL = 0x04; // Port2 Select: 00000100 = 0x04
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P2OUT = 0x00; // Port2 Output: 00000000 = 0x00
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P2DIR = 0xFF; // Port2 Direction: 11111111 = 0xFF
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// Port 3: UART
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P3SEL = 0xFE; // Port3 Select: 11111110 = 0xFE
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P3OUT = 0x00; // Port3 Output: 00000000 = 0x00
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P3DIR = 0xFF; // Port3 Direction: 11111111 = 0xFF
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// Port 4: CS
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P4SEL = 0x00; // Port4 Select: 00000000 = 0x00
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P4OUT = 0x14; // Port4 Output: 00010100 = 0x14
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P4DIR = 0xFF; // Port4 Direction: 11111111 = 0xFF
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// Port 5: SPI, LED
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P5SEL = 0x0E; // Port5 Select: 00001110 = 0x0E
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P5OUT = 0x70; // Port5 Output: 01110000 = 0x70
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P5DIR = 0x70; // Port5 Direction: 01110000 = 0x70
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P6SEL = 0xFF; // Port6 Select: 11111111 = 0xFF
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P6OUT = 0x00; // Port6 Output: 00000000 = 0x00
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P6DIR = 0xFF; // Port6 Direction: 11111000 = 0xF8
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}
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void msp430_set_cpu_speed(uint32_t speed)
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{
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2016-03-19 09:25:47 +01:00
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irq_disable();
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2013-05-25 12:34:18 +02:00
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__msp430_cpu_speed = speed;
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msp430_init_dco();
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2016-03-19 09:25:47 +01:00
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irq_enable();
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2013-05-25 12:34:18 +02:00
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}
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/*---------------------------------------------------------------------------*/
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void msp430_init_dco(void)
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{
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/*----------------------- use external oszillator -------------------------*/
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uint16_t i;
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// Stop watchdog
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WDTCTL = WDTPW + WDTHOLD;
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BCSCTL1 = RSEL2;
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// Wait for xtal to stabilize
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do {
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IFG1 &= ~OFIFG; // Clear oscillator fault flag
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for (i = 0xFF; i > 0; i--); // Time for flag to set
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}
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while ((IFG1 & OFIFG) != 0); // Oscillator fault flag still set?
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switch (__msp430_cpu_speed) {
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case MCLK_2MHZ_SCLK_1MHZ:
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BCSCTL2 = (SELM_2 | DIVM_2) | (SELS | DIVS_3);
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break;
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case MCLK_4MHZ_SCLK_1MHZ:
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BCSCTL2 = (SELM_2 | DIVM_1) | (SELS | DIVS_3);
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break;
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case MCLK_8MHZ_SCLK_1MHZ:
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BCSCTL2 = SELM_2 | (SELS | DIVS_3);
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break;
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default:
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BCSCTL2 = SELM_2 + SELS; // MCLK and SMCLK = XT2 (safe)
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break;
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}
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}
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2014-05-07 12:36:32 +02:00
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void board_init(void)
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{
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2013-05-25 12:34:18 +02:00
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msp430_cpu_init();
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msb_ports_init();
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2014-02-11 18:15:43 +01:00
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2013-05-25 12:34:18 +02:00
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msp430_set_cpu_speed(MCLK_8MHZ_SCLK_8MHZ);
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2015-08-28 19:05:53 +02:00
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2016-03-09 19:39:34 +01:00
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/* initialize STDIO over UART */
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2015-09-22 04:39:39 +02:00
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uart_stdio_init();
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2013-05-25 12:34:18 +02:00
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}
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