2021-12-27 14:11:02 +01:00
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BOARD ?= nucleo-f767zi
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# Custom per-board pin configuration (e.g. for setting PORT_IN, PIN_IN_0, ...)
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# can be provided in a Makefile.$(BOARD) file:
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-include Makefile.$(BOARD)
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# Choose two input pins and two pins that do not conflict with stdio. All four
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# *can* be on the same GPIO port, but the two output pins and the two inputs
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# pins *must* be on the same port, respectively. Connect the first input to the
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# first output pin and the second input pin to the second output pin, e.g. using
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# jumper wires.
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drivers/periph_gpio_ll: change API to access GPIO ports
The API was based on the assumption that GPIO ports are mapped in memory
sanely, so that a `GPIO_PORT(num)` macro would work allow for constant
folding when `num` is known and still be efficient when it is not.
Some MCUs, however, will need a look up tables to efficiently translate
GPIO port numbers to the port's base address. This will prevent the use
of such a `GPIO_PORT(num)` macro in constant initializers.
As a result, we rather provide `GPIO_PORT_0`, `GPIO_PORT_1`, etc. macros
for each GPIO port present (regardless of MCU naming scheme), as well as
`GPIO_PORT_A`, `GPIO_PORT_B`, etc. macros if (and only if) the MCU port
naming scheme uses letters rather than numbers.
These can be defined as macros to the peripheral base address even when
those are randomly mapped into the address space. In addition, a C
function `gpio_port()` replaces the role of the `GPIO_PORT()` and
`gpio_port_num()` the `GPIO_PORT_NUM()` macro. Those functions will
still be implemented as efficient as possible and will allow constant
folding where it was formerly possible. Hence, there is no downside for
MCUs with sane peripheral memory mapping, but it is highly beneficial
for the crazy ones.
There are also two benefits for the non-crazy MCUs:
1. We can now test for valid port numbers with `#ifdef GPIO_PORT_<NUM>`
- This directly benefits the test in `tests/periph/gpio_ll`, which
can now provide a valid GPIO port for each and every board
- Writing to invalid memory mapped I/O addresses was treated as
triggering undefined behavior by the compiler and used as a
optimization opportunity
2. We can now detect at compile time if the naming scheme of the MCU
uses letters or numbers, and produce more user friendly output.
- This is directly applied in the test app
2024-04-29 13:32:24 +02:00
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PORT_IN ?=
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PORT_OUT ?=
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2021-12-27 14:11:02 +01:00
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PIN_IN_0 ?= 0
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PIN_IN_1 ?= 1
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2024-01-19 10:37:32 +01:00
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PIN_OUT_0 ?= 2
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PIN_OUT_1 ?= 3
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2021-12-27 14:11:02 +01:00
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# Boards that require tweaking for low ROM
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LOW_ROM_BOARDS := \
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nucleo-l011k4 \
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stm32f030f4-demo \
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#
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ifneq (,$(filter $(BOARD),$(LOW_ROM_BOARDS)))
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LOW_ROM ?= 1
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endif
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LOW_ROM ?= 0
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2023-05-05 10:26:35 +02:00
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include ../Makefile.periph_common
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2021-12-27 14:11:02 +01:00
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FEATURES_REQUIRED += periph_gpio_ll
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FEATURES_OPTIONAL += periph_gpio_ll_irq
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FEATURES_OPTIONAL += periph_gpio_ll_irq_level_triggered_high
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FEATURES_OPTIONAL += periph_gpio_ll_irq_level_triggered_low
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USEMODULE += ztimer_usec
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include $(RIOTBASE)/Makefile.include
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drivers/periph_gpio_ll: change API to access GPIO ports
The API was based on the assumption that GPIO ports are mapped in memory
sanely, so that a `GPIO_PORT(num)` macro would work allow for constant
folding when `num` is known and still be efficient when it is not.
Some MCUs, however, will need a look up tables to efficiently translate
GPIO port numbers to the port's base address. This will prevent the use
of such a `GPIO_PORT(num)` macro in constant initializers.
As a result, we rather provide `GPIO_PORT_0`, `GPIO_PORT_1`, etc. macros
for each GPIO port present (regardless of MCU naming scheme), as well as
`GPIO_PORT_A`, `GPIO_PORT_B`, etc. macros if (and only if) the MCU port
naming scheme uses letters rather than numbers.
These can be defined as macros to the peripheral base address even when
those are randomly mapped into the address space. In addition, a C
function `gpio_port()` replaces the role of the `GPIO_PORT()` and
`gpio_port_num()` the `GPIO_PORT_NUM()` macro. Those functions will
still be implemented as efficient as possible and will allow constant
folding where it was formerly possible. Hence, there is no downside for
MCUs with sane peripheral memory mapping, but it is highly beneficial
for the crazy ones.
There are also two benefits for the non-crazy MCUs:
1. We can now test for valid port numbers with `#ifdef GPIO_PORT_<NUM>`
- This directly benefits the test in `tests/periph/gpio_ll`, which
can now provide a valid GPIO port for each and every board
- Writing to invalid memory mapped I/O addresses was treated as
triggering undefined behavior by the compiler and used as a
optimization opportunity
2. We can now detect at compile time if the naming scheme of the MCU
uses letters or numbers, and produce more user friendly output.
- This is directly applied in the test app
2024-04-29 13:32:24 +02:00
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ifneq (,$(PORT_OUT))
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CFLAGS += -DPORT_OUT=GPIO_PORT_$(PORT_OUT)
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CFLAGS += -DPORT_OUT_NUM=$(PORT_OUT)
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endif
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ifneq (,$(PORT_IN))
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CFLAGS += -DPORT_IN=GPIO_PORT_$(PORT_IN)
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CFLAGS += -DPORT_IN_NUM=$(PORT_IN)
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endif
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2021-12-27 14:11:02 +01:00
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CFLAGS += -DPIN_IN_0=$(PIN_IN_0)
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CFLAGS += -DPIN_IN_1=$(PIN_IN_1)
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CFLAGS += -DPIN_OUT_0=$(PIN_OUT_0)
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CFLAGS += -DPIN_OUT_1=$(PIN_OUT_1)
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CFLAGS += -DLOW_ROM=$(LOW_ROM)
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2022-06-15 09:59:29 +02:00
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2024-02-16 20:38:25 +01:00
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ifneq ($(CPU),esp32)
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2022-06-15 09:59:29 +02:00
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# We only need 1 thread (+ the Idle thread on some platforms) and we really
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# want this app working on all boards.
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CFLAGS += -DMAXTHREADS=2
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else
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2022-07-22 06:25:06 +02:00
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# ESP32x SoCs uses an extra thread for esp_timer
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2022-06-15 09:59:29 +02:00
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CFLAGS += -DMAXTHREADS=3
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endif
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