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RIOT/cpu/nrf5x_common/include/periph_cpu.h

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/*
* Copyright (C) 2015-2016 Freie Universität Berlin
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*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_nrf5x_common
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* @{
*
* @file
* @brief CPU specific definitions for handling peripherals
*
* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
*/
#ifndef CPU_PERIPH_H
#define CPU_PERIPH_H
#include "cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
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/**
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* @brief Iron out some differences in register and IRQ channel naming between
* the different nRFx family members
* @{
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*/
#if defined(CPU_FAM_NRF51)
#define GPIO_BASE (NRF_GPIO)
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#define UART_IRQN (UART0_IRQn)
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#elif defined(CPU_FAM_NRF52)
#define GPIO_BASE (NRF_P0)
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#define UART_IRQN (UARTE0_UART0_IRQn)
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#else
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#error "nrf5x_common: no valid value for CPU_FAM_XX defined"
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#endif
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/** @} */
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/**
* @brief Length of the CPU_ID in octets
*/
#define CPUID_LEN (8U)
/**
* @brief Override macro for defining GPIO pins
*
* The port definition is used (and zeroed) to suppress compiler warnings
*/
#define GPIO_PIN(x,y) ((x & 0) | y)
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/**
* @brief Override GPIO pull register select values
* @{
*/
#define HAVE_GPIO_PP_T
typedef enum {
GPIO_NOPULL = 0, /**< do not use internal pull resistors */
GPIO_PULLUP = 3, /**< enable internal pull-up resistor */
GPIO_PULLDOWN = 1 /**< enable internal pull-down resistor */
} gpio_pp_t;
/** @} */
/**
* @brief Override GPIO active flank values
* @{
*/
#define HAVE_GPIO_FLANK_T
typedef enum {
GPIO_FALLING = 2, /**< emit interrupt on falling flank */
GPIO_RISING = 1, /**< emit interrupt on rising flank */
GPIO_BOTH = 3 /**< emit interrupt on both flanks */
} gpio_flank_t;
/** @} */
/**
* @brief Timer configuration options
*/
typedef struct {
NRF_TIMER_Type *dev;
uint8_t channels;
uint8_t bitmode;
uint8_t irqn;
} timer_conf_t;
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#ifdef __cplusplus
}
#endif
#endif /* CPU_PERIPH_H */
/** @} */