2016-03-18 18:33:53 +01:00
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# the cpu to build for
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export CPU = stm32f1
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export CPU_MODEL = stm32f103re
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# define the default port depending on the host OS
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PORT_LINUX ?= /dev/ttyUSB1
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2016-10-11 15:23:37 +02:00
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PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbserial*B)))
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2016-03-18 18:33:53 +01:00
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# setup serial terminal
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export BAUD = 500000
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2016-01-27 10:47:12 +01:00
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include $(RIOTMAKE)/tools/serial.inc.mk
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2016-03-18 18:33:53 +01:00
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2018-04-18 17:54:07 +02:00
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# call a 'reset halt' command before starting the debugger
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# it is required as `connect_assert_srst` is set
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export OPENOCD_DBG_START_CMD = -c 'reset halt'
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2016-03-18 18:33:53 +01:00
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# this board uses openocd
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2016-01-27 10:47:12 +01:00
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include $(RIOTMAKE)/tools/openocd.inc.mk
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2016-03-18 18:33:53 +01:00
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# add the common header files to the include path
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2017-11-16 12:21:26 +01:00
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INCLUDES += -I$(RIOTBOARD)/common/iotlab/include
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