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59 lines
1.8 KiB
C
59 lines
1.8 KiB
C
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/*
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* Copyright (C) 2020 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief Main header for STM32F2/F4/F7 clock configuration
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef CLK_F2F4F7_CFG_CLOCK_DEFAULT_H
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#define CLK_F2F4F7_CFG_CLOCK_DEFAULT_H
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#if defined(CPU_FAM_STM32F2)
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#include "f2f4f7/cfg_clock_default_120.h"
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#elif defined(CPU_FAM_STM32F4)
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#if defined(CPU_LINE_STM32F401xC) || defined(CPU_LINE_STM32F401xE)
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#include "f2f4f7/cfg_clock_default_84.h"
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#elif defined(CPU_LINE_STM32F410Cx) || defined(CPU_LINE_STM32F410Rx) || \
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defined(CPU_LINE_STM32F410Tx) || defined(CPU_LINE_STM32F411xE) || \
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defined(CPU_LINE_STM32F412Cx) || defined(CPU_LINE_STM32F412Rx) || \
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defined(CPU_LINE_STM32F412Vx) || defined(CPU_LINE_STM32F412Zx) || \
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defined(CPU_LINE_STM32F413xx) || defined(CPU_LINE_STM32F423xx)
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#include "f2f4f7/cfg_clock_default_100.h"
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#elif defined(CPU_LINE_STM32F405xx) || defined(CPU_LINE_STM32F407xx) || \
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defined(CPU_LINE_STM32F415xx) || defined(CPU_LINE_STM32F417xx) || \
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defined(CPU_LINE_STM32F427xx) || defined(CPU_LINE_STM32F437xx) || \
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defined(CPU_LINE_STM32F429xx) || defined(CPU_LINE_STM32F439xx) || \
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defined(CPU_LINE_STM32F446xx) || defined(CPU_LINE_STM32F469xx) || \
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defined(CPU_LINE_STM32F479xx)
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#include "f2f4f7/cfg_clock_default_180.h"
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#else
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#error "No clock configuration available for this F4 line"
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#endif
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#elif defined(CPU_FAM_STM32F7)
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#include "f2f4f7/cfg_clock_default_216.h"
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#else
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#error "No clock configuration available for this family"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* CLK_F2F4F7_CFG_CLOCK_DEFAULT_H */
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/** @} */
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