2015-06-19 11:45:06 +02:00
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/*
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* Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_lpc2387
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* @{
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*
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* @file
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* @brief Low-level SPI driver implementation
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*
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* @author Kaspar Schleiser <kaspar@schleiser.de>
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*
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* @}
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*/
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#include "cpu.h"
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#include "mutex.h"
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#include "periph/gpio.h"
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#include "periph/spi.h"
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#include "periph_conf.h"
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#include "board.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#if SPI_0_EN
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#define SPI_TX_EMPTY (SSP0SR & SSPSR_TFE)
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#define SPI_BUSY (SSP0SR & SSPSR_BSY)
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#define SPI_RX_AVAIL (SSP0SR & SSPSR_RNE)
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/**
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* @brief Array holding one pre-initialized mutex for each SPI device
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*/
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static mutex_t locks[] = {
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#if SPI_0_EN
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[SPI_0] = MUTEX_INIT,
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#endif
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#if SPI_1_EN
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[SPI_1] = MUTEX_INIT,
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#endif
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#if SPI_2_EN
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[SPI_2] = MUTEX_INIT
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#endif
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};
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int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
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{
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2015-11-28 14:18:29 +01:00
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(void ) conf;
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2015-06-19 11:45:06 +02:00
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if (dev) {
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return -1;
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}
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uint32_t f_baud = 0;
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switch(speed)
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{
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case SPI_SPEED_100KHZ:
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f_baud = 100;
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break;
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case SPI_SPEED_400KHZ:
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f_baud = 400;
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break;
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case SPI_SPEED_1MHZ:
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f_baud = 1000;
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break;
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case SPI_SPEED_5MHZ:
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f_baud = 5000;
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break;
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case SPI_SPEED_10MHZ:
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f_baud = 10000;
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break;
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}
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#if 0
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/* TODO */
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switch(conf)
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{
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case SPI_CONF_FIRST_RISING:
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/**< first data bit is transacted on the first rising SCK edge */
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cpha = 0;
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cpol = 0;
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break;
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case SPI_CONF_SECOND_RISING:
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/**< first data bit is transacted on the second rising SCK edge */
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cpha = 1;
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cpol = 0;
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break;
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case SPI_CONF_FIRST_FALLING:
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/**< first data bit is transacted on the first falling SCK edge */
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cpha = 0;
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cpol = 1;
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break;
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case SPI_CONF_SECOND_FALLING:
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/**< first data bit is transacted on the second falling SCK edge */
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cpha = 1;
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cpol = 1;
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break;
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}
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#endif
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/* Power*/
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PCONP |= PCSSP0; /* Enable power for SSP0 (default is on)*/
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/* PIN Setup*/
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2015-09-11 11:13:57 +02:00
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spi_conf_pins(dev);
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2015-06-19 11:45:06 +02:00
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/* Interface Setup*/
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SSP0CR0 = 7;
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/* Clock Setup*/
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uint32_t pclksel;
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uint32_t cpsr;
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2016-01-05 13:29:52 +01:00
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lpc2387_pclk_scale(CLOCK_CORECLOCK / 1000, f_baud, &pclksel, &cpsr);
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2015-06-19 11:45:06 +02:00
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PCLKSEL1 &= ~(BIT10 | BIT11); /* CCLK to PCLK divider*/
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PCLKSEL1 |= pclksel << 10;
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SSP0CPSR = cpsr;
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/* Enable*/
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SSP0CR1 |= BIT1; /* SSP-Enable*/
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int dummy;
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/* Clear RxFIFO:*/
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while (SPI_RX_AVAIL) { /* while RNE (Receive FIFO Not Empty)...*/
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dummy = SSP0DR; /* read data*/
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}
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/* to suppress unused-but-set-variable */
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(void) dummy;
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return 0;
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}
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int spi_init_slave(spi_t dev, spi_conf_t conf, char (*cb)(char))
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{
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(void)dev;
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(void)conf;
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(void)cb;
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printf("%s:%s(): stub\n", RIOT_FILE_RELATIVE, __func__);
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/* TODO */
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2015-09-17 11:04:03 +02:00
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return -1;
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2015-06-19 11:45:06 +02:00
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}
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void spi_transmission_begin(spi_t dev, char reset_val)
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{
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(void)dev;
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(void)reset_val;
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printf("%s:%s(): stub\n", RIOT_FILE_RELATIVE, __func__);
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/* TODO*/
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}
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int spi_acquire(spi_t dev)
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{
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if (dev >= SPI_NUMOF) {
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return -1;
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}
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mutex_lock(&locks[dev]);
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return 0;
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}
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int spi_release(spi_t dev)
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{
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if (dev >= SPI_NUMOF) {
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return -1;
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}
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mutex_unlock(&locks[dev]);
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return 0;
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}
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int spi_transfer_byte(spi_t dev, char out, char *in)
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{
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2015-11-28 14:18:29 +01:00
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(void) dev;
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2015-06-19 11:45:06 +02:00
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while (!SPI_TX_EMPTY);
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SSP0DR = out;
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while (SPI_BUSY);
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while (!SPI_RX_AVAIL);
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char tmp = (char)SSP0DR;
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if (in != NULL) {
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*in = tmp;
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}
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return 1;
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}
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void spi_poweron(spi_t dev)
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{
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2015-11-28 14:18:29 +01:00
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(void) dev;
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2015-06-19 11:45:06 +02:00
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}
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void spi_poweroff(spi_t dev)
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{
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2015-11-28 14:18:29 +01:00
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(void) dev;
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(void) dev;
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2015-06-19 11:45:06 +02:00
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}
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2015-09-11 11:13:57 +02:00
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int spi_conf_pins(spi_t dev)
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{
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switch (dev) {
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case 0:
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PINSEL3 |= BIT8 + BIT9; /* SCLK */
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PINSEL3 |= BIT14 + BIT15; /* MISO */
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PINSEL3 |= BIT16 + BIT17; /* MOSI */
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return 0;
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default:
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return -1;
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}
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}
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2015-06-19 11:45:06 +02:00
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#endif /* SPI_0_EN */
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