2014-02-20 15:53:49 +01:00
|
|
|
/*
|
|
|
|
* Copyright (C) 2014 Freie Universität Berlin
|
|
|
|
*
|
|
|
|
* This file is subject to the terms and conditions of the GNU Lesser General
|
|
|
|
* Public License v2.1. See the file LICENSE in the top level directory for more
|
|
|
|
* details.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @ingroup boards_msba2
|
|
|
|
* @{
|
|
|
|
*
|
|
|
|
* @file
|
|
|
|
* @brief MSB-A2 peripheral configuration
|
|
|
|
*
|
|
|
|
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
|
|
|
|
*/
|
|
|
|
|
2017-01-18 13:00:05 +01:00
|
|
|
#ifndef PERIPH_CONF_H
|
|
|
|
#define PERIPH_CONF_H
|
2014-02-20 15:53:49 +01:00
|
|
|
|
|
|
|
#include "lpc2387.h"
|
|
|
|
|
2014-10-13 15:25:50 +02:00
|
|
|
#ifdef __cplusplus
|
|
|
|
extern "C" {
|
|
|
|
#endif
|
|
|
|
|
2015-09-03 23:48:14 +02:00
|
|
|
/**
|
2017-04-10 19:04:32 +02:00
|
|
|
* @name Clock configuration
|
2015-09-03 23:48:14 +02:00
|
|
|
* @{
|
|
|
|
*/
|
|
|
|
#define CLOCK_CORECLOCK (72000000U) /* the msba2 runs with 72MHz */
|
|
|
|
|
|
|
|
#define CLOCK_PCLK (CLOCK_CORECLOCK)
|
|
|
|
/** @} */
|
|
|
|
|
|
|
|
/**
|
2017-04-10 19:04:32 +02:00
|
|
|
* @name Timer configuration, select a number from 1 to 4
|
2015-09-03 23:48:14 +02:00
|
|
|
* @{
|
|
|
|
*/
|
|
|
|
#define TIMER_NUMOF (1U)
|
|
|
|
/** @} */
|
|
|
|
|
2014-02-20 15:53:49 +01:00
|
|
|
/**
|
2017-02-16 17:59:21 +01:00
|
|
|
* @name PWM device and pinout configuration
|
2016-12-13 16:44:52 +01:00
|
|
|
*
|
|
|
|
* Currently, we only support a single device and 3 channels, the implementation
|
|
|
|
* is fixed on PWM1.
|
|
|
|
* @{
|
2014-02-20 15:53:49 +01:00
|
|
|
*/
|
2015-10-21 13:33:56 +02:00
|
|
|
#define PWM_NUMOF (1U)
|
2014-02-20 15:53:49 +01:00
|
|
|
|
|
|
|
/* PWM_0 device configuration */
|
2016-12-13 16:44:52 +01:00
|
|
|
#define PWM_CHANNELS (3)
|
|
|
|
#define PWM_CH0 (3)
|
|
|
|
#define PWM_CH0_MR PWM1MR3
|
|
|
|
#define PWM_CH1 (4)
|
|
|
|
#define PWM_CH1_MR PWM1MR4
|
|
|
|
#define PWM_CH2 (5)
|
|
|
|
#define PWM_CH2_MR PWM1MR5
|
2014-02-20 15:53:49 +01:00
|
|
|
/* PWM_0 pin configuration */
|
2016-12-13 16:44:52 +01:00
|
|
|
#define PWM_PORT PINSEL4
|
|
|
|
#define PWM_CH0_PIN (2)
|
|
|
|
#define PWM_CH1_PIN (3)
|
|
|
|
#define PWM_CH2_PIN (4)
|
|
|
|
#define PWM_FUNC (1)
|
|
|
|
/** @} */
|
2014-02-20 15:53:49 +01:00
|
|
|
|
2014-11-20 17:55:28 +01:00
|
|
|
/**
|
2017-04-10 19:04:32 +02:00
|
|
|
* @name Real Time Clock configuration
|
|
|
|
* @{
|
2014-11-20 17:55:28 +01:00
|
|
|
*/
|
|
|
|
#define RTC_NUMOF (1)
|
2017-04-10 19:04:32 +02:00
|
|
|
/** @} */
|
2014-11-20 17:55:28 +01:00
|
|
|
|
2015-06-04 13:43:46 +02:00
|
|
|
/**
|
2017-04-10 19:04:32 +02:00
|
|
|
* @name UART configuration
|
2015-06-19 11:45:06 +02:00
|
|
|
* @{
|
2015-06-04 13:43:46 +02:00
|
|
|
*/
|
|
|
|
#define UART_NUMOF (1)
|
|
|
|
#define UART_0_EN (1)
|
2015-06-19 11:45:06 +02:00
|
|
|
/** @} */
|
|
|
|
|
|
|
|
/**
|
2017-04-10 19:04:32 +02:00
|
|
|
* @name SPI configuration
|
2016-11-08 18:25:21 +01:00
|
|
|
*
|
|
|
|
* The SPI implementation is very much fixed, so we don't need to configure
|
|
|
|
* anything besides the mandatory SPI_NUMOF.
|
2015-06-19 11:45:06 +02:00
|
|
|
* @{
|
|
|
|
*/
|
|
|
|
#define SPI_NUMOF (1)
|
|
|
|
/** @} */
|
2015-06-04 13:43:46 +02:00
|
|
|
|
2014-10-13 15:25:50 +02:00
|
|
|
#ifdef __cplusplus
|
|
|
|
}
|
|
|
|
#endif
|
2014-02-20 15:53:49 +01:00
|
|
|
|
2017-01-18 13:00:05 +01:00
|
|
|
#endif /* PERIPH_CONF_H */
|
2014-02-20 15:53:49 +01:00
|
|
|
/** @} */
|