mirror of
https://github.com/RIOT-OS/RIOT.git
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299 lines
6.5 KiB
C
299 lines
6.5 KiB
C
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/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_msp430fxyz
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* @{
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*
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* @file
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* @brief Low-level UART driver implementation
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include "cpu.h"
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#include "periph_cpu.h"
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#include "periph_conf.h"
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#include "periph/uart.h"
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/**
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* @brief Keep track of the interrupt context
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* @{
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*/
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static uart_rx_cb_t ctx_rx_cb;
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static uart_tx_cb_t ctx_tx_cb;
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static void *ctx_isr_arg;
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/** @} */
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/* per default, we use the legacy MSP430 USART module for UART functionality */
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#ifndef UART_USE_USIC
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int uart_init(uart_t uart, uint32_t baudrate,
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uart_rx_cb_t rx_cb, uart_tx_cb_t tx_cb, void *arg)
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{
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if (uart_init_blocking(uart, baudrate) < 0) {
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return -1;
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}
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/* save interrupt context */
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ctx_rx_cb = rx_cb;
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ctx_tx_cb = tx_cb;
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ctx_isr_arg = arg;
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/* reset interrupt flags and enable RX interrupt */
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UART_IE &= ~(UART_IE_TX_BIT);
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UART_IF &= ~(UART_IE_RX_BIT);
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UART_IF |= (UART_IE_TX_BIT);
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UART_IE |= (UART_IE_RX_BIT);
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return 0;
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}
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int uart_init_blocking(uart_t uart, uint32_t baudrate)
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{
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if (uart != 0) {
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return -1;
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}
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/* get the default UART for now -> TODO: enable for multiple devices */
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msp_usart_t *dev = UART_DEV;
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/* power off and reset device */
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uart_poweroff(uart);
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dev->CTL = USART_CTL_SWRST;
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/* configure to 8N1 and using the SMCLK*/
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dev->CTL |= USART_CTL_CHAR;
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dev->TCTL = (USART_TCTL_TXEPT | USART_TCTL_URXSE | USART_TCTL_SSEL_SMCLK);
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dev->RCTL = 0x00;
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/* baudrate configuration */
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uint16_t br = (uint16_t)(CLOCK_CMCLK / baudrate);
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dev->BR0 = (uint8_t)br;
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dev->BR1 = (uint8_t)(br >> 8);
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/* TODO: calculate value for modulation register */
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dev->MCTL = 0;
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/* configure pins -> TODO: move into GPIO driver (once implemented) */
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UART_PORT->SEL |= (UART_RX_PIN | UART_TX_PIN);
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UART_PORT->OD |= UART_RX_PIN;
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UART_PORT->OD &= ~(UART_TX_PIN);
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UART_PORT->DIR |= UART_TX_PIN;
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UART_PORT->DIR &= ~(UART_RX_PIN);
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/* enable receiver and transmitter */
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uart_poweron(uart);
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/* and finally release the software reset bit */
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dev->CTL &= ~(USART_CTL_SWRST);
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return 0;
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}
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void uart_tx_begin(uart_t uart)
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{
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(void)uart;
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UART_IE |= UART_IE_TX_BIT;
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}
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int uart_write(uart_t uart, char data)
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{
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(void)uart;
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msp_usart_t *dev = UART_DEV;
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dev->TXBUF = (uint8_t)data;
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return 1;
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}
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int uart_write_blocking(uart_t uart, char data)
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{
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(void)uart;
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msp_usart_t *dev = UART_DEV;
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while (!(dev->TCTL & USART_TCTL_TXEPT));
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dev->TXBUF = (uint8_t)data;
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return 1;
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}
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int uart_read_blocking(uart_t uart, char *data)
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{
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(void)uart;
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msp_usart_t *dev = UART_DEV;
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while (!(UART_IF & UART_IE_RX_BIT));
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*data = (char)dev->RXBUF;
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return 1;
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}
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void uart_poweron(uart_t uart)
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{
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UART_ME |= UART_ME_BITS;
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}
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void uart_poweroff(uart_t uart)
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{
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UART_ME &= ~(UART_ME_BITS);
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}
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ISR(UART_RX_ISR, isr_uart_0_rx)
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{
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__enter_isr();
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if (UART_IF & UART_IE_RX_BIT) {
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char data = (char)UART_DEV->RXBUF;
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UART_IF &= ~(UART_IE_RX_BIT);
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ctx_rx_cb(ctx_isr_arg, data);
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}
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__exit_isr();
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}
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ISR(UART_TX_ISR, isr_uart_0_tx)
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{
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__enter_isr();
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if (UART_IF & UART_IE_TX_BIT) {
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if (ctx_tx_cb(ctx_isr_arg) == 0) {
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UART_IE &= ~(UART_IE_TX_BIT);
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}
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else {
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UART_IF &= ~(UART_IE_TX_BIT);
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}
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}
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__exit_isr();
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}
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/* we use alternative UART code in case the board used the USIC module for UART
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* in case of the (older) USART module */
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#else
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int uart_init(uart_t uart, uint32_t baudrate,
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uart_rx_cb_t rx_cb, uart_tx_cb_t tx_cb, void *arg)
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{
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if (uart_init_blocking(uart, baudrate) < 0) {
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return -1;
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}
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/* save interrupt context */
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ctx_rx_cb = rx_cb;
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ctx_tx_cb = tx_cb;
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ctx_isr_arg = arg;
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/* reset interrupt flags and enable RX interrupt */
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UART_IF &= ~(UART_IE_RX_BIT);
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UART_IF |= (UART_IE_TX_BIT);
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UART_IE |= (UART_IE_RX_BIT);
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UART_IE &= ~(UART_IE_TX_BIT);
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return 0;
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}
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int uart_init_blocking(uart_t uart, uint32_t baudrate)
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{
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if (uart != 0) {
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return -1;
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}
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/* get the default UART for now -> TODO: enable for multiple devices */
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msp_usci_t *dev = UART_DEV;
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/* put device in reset mode while configuration is going on */
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dev->ACTL1 = USCI_ACTL1_SWRST;
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/* configure to UART, using SMCLK in 8N1 mode */
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dev->ACTL1 |= USCI_ACTL1_SSEL_SMCLK;
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dev->ACTL0 = 0;
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dev->ASTAT = 0;
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/* configure baudrate */
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uint32_t base = ((CLOCK_CMCLK << 7) / baudrate);
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uint16_t br = (uint16_t)(base >> 7);
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uint8_t brs = (((base & 0x3f) * 8) >> 7);
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dev->ABR0 = (uint8_t)br;
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dev->ABR1 = (uint8_t)(br >> 8);
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dev->AMCTL = (brs << USCI_AMCTL_BRS_SHIFT);
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/* pin configuration -> TODO: move to GPIO driver once implemented */
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UART_RX_PORT->SEL |= UART_RX_PIN;
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UART_TX_PORT->SEL |= UART_TX_PIN;
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UART_RX_PORT->DIR &= ~(UART_RX_PIN);
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UART_TX_PORT->DIR &= ~(UART_TX_PIN);
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/* releasing the software reset bit starts the UART */
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dev->ACTL1 &= ~(USCI_ACTL1_SWRST);
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return 0;
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}
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void uart_tx_begin(uart_t uart)
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{
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UART_IE |= (UART_IE_TX_BIT);
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}
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int uart_write(uart_t uart, char data)
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{
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(void)uart;
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UART_DEV->ATXBUF = (uint8_t)data;
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return 1;
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}
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int uart_write_blocking(uart_t uart, char data)
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{
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(void)uart;
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while (!(UART_IF & UART_IE_TX_BIT));
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UART_DEV->ATXBUF = (uint8_t)data;
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return 1;
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}
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int uart_read_blocking(uart_t uart, char *data)
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{
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(void)uart;
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while (!(UART_IF & UART_IE_RX_BIT));
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*data = (char)UART_DEV->ARXBUF;
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return 1;
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}
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void uart_poweron(uart_t uart)
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{
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(void)uart;
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/* n/a */
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}
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void uart_poweroff(uart_t uart)
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{
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(void)uart;
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/* n/a */
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}
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ISR(UART_RX_ISR, isr_uart_0_rx)
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{
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__enter_isr();
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uint8_t stat = UART_DEV->ASTAT;
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char data = (char)UART_DEV->ARXBUF;
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if (stat & (USCI_ASTAT_FE | USCI_ASTAT_OE | USCI_ASTAT_PE | USCI_ASTAT_BRK)) {
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/* some error which we do not handle, just do a pseudo read to reset the
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* status register */
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(void)data;
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}
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else {
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ctx_rx_cb(ctx_isr_arg, data);
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}
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__exit_isr();
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}
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ISR(UART_TX_ISR, isr_uart0_tx)
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{
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__enter_isr();
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if (ctx_tx_cb(ctx_isr_arg) == 0) {
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UART_IE &= ~(UART_IE_TX_BIT);
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}
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else {
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UART_IF &= ~(UART_IE_TX_BIT);
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}
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__exit_isr();
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}
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#endif
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