2014-02-20 15:53:05 +01:00
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup lpc2387
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* @{
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*
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* @file
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* @brief CPU specific low-level PWM driver implementation for the LPC2387
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include "bitarithm.h"
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#include "lpc2387.h"
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#include "periph_conf.h"
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2014-07-24 16:08:03 +02:00
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/* guard file in case no PWM device is defined */
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2015-10-21 12:42:52 +02:00
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#if (PWM_0_EN || PWM_1_EN)
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/* pull the PWM header inside the guards for now. Guards will be removed on
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* adapting this driver implementation... */
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#include "periph/pwm.h"
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2014-02-20 15:53:05 +01:00
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/**
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* @note The PWM is always initialized with left-aligned mode.
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*
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* TODO: add center and right aligned modes
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*/
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2015-10-21 12:42:52 +02:00
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uint32_t pwm_init(pwm_t dev, pwm_mode_t mode, uint32_t freq, uint16_t res)
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2014-02-20 15:53:05 +01:00
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{
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2014-07-12 07:56:22 +02:00
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(void) mode; /* unused */
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2014-02-20 15:53:05 +01:00
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switch (dev) {
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#if PWM_0_EN
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case PWM_0:
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/* select function PWM[3] for pins */
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PWM_0_PORT &= ~((3 << PWM_0_CH0_PIN * 2) |
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(3 << PWM_0_CH1_PIN * 2) |
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(3 << PWM_0_CH2_PIN * 2));
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PWM_0_PORT |= (PWM_0_FUNC << PWM_0_CH0_PIN * 2) |
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(PWM_0_FUNC << PWM_0_CH1_PIN * 2) |
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(PWM_0_FUNC << PWM_0_CH2_PIN * 2);
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/* power on PWM1 */
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2014-07-24 16:08:03 +02:00
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pwm_poweron(dev);
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2014-02-20 15:53:05 +01:00
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/* select PWM1 clock */
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PCLKSEL0 &= ~(BIT13);
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PCLKSEL0 |= (BIT12);
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/* reset PWM1s counter */
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PWM1TCR = BIT1;
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/* set prescaler */
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2015-10-21 12:42:52 +02:00
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PWM1PR = (CLOCK_CORECLOCK / (freq * res)) - 1;
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2014-02-20 15:53:05 +01:00
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/* set match register */
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2015-10-21 12:42:52 +02:00
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PWM1MR0 = res;
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2014-02-20 15:53:05 +01:00
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PWM_0_CH0_MR = 0;
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PWM_0_CH1_MR = 0;
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PWM_0_CH2_MR = 0;
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/* reset timer counter on MR0 match */
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PWM1MCR = BIT1;
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/* enable PWM1 channel 3, 4 and 5 */
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PWM1PCR = (1 << (8 + PWM_0_CH0)) | (1 << (8 + PWM_0_CH1)) | (1 << (8 + PWM_0_CH2));
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/* enable PWM1 timer in PWM mode */
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PWM1TCR = BIT0 + BIT3;
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/* update match registers */
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PWM1LER = BIT0 | (1 << PWM_0_CH0) | (1 << PWM_0_CH1) | (1 << PWM_0_CH2);
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break;
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#endif
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2015-10-21 12:42:52 +02:00
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default:
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return 0;
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2014-02-20 15:53:05 +01:00
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}
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2015-10-21 12:42:52 +02:00
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return freq;
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}
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uint8_t pwm_channels(pwm_t dev)
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{
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if (dev == PWM_0) {
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return PWM_0_CHANNELS;
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}
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return 0;
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2014-02-20 15:53:05 +01:00
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}
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2015-10-21 12:42:52 +02:00
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void pwm_set(pwm_t dev, uint8_t channel, uint16_t value)
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2014-02-20 15:53:05 +01:00
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{
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switch (dev) {
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#if PWM_0_EN
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case PWM_0:
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switch (channel) {
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case 0:
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PWM_0_CH0_MR = value;
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PWM1LER |= (1 << PWM_0_CH0);
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break;
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case 1:
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PWM_0_CH1_MR = value;
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PWM1LER |= (1 << PWM_0_CH1);
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break;
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case 2:
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PWM_0_CH2_MR = value;
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PWM1LER |= (1 << PWM_0_CH2);
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break;
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default:
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2015-10-21 12:42:52 +02:00
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return;
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2014-02-20 15:53:05 +01:00
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break;
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}
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break;
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#endif
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}
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}
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2014-07-24 16:08:03 +02:00
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void pwm_start(pwm_t dev)
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2014-02-20 15:53:05 +01:00
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{
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switch (dev) {
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#if PWM_0_EN
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case PWM_0:
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2014-07-24 16:08:03 +02:00
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PWM1TCR |= BIT0;
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2014-02-20 15:53:05 +01:00
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break;
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#endif
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}
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2014-07-24 16:08:03 +02:00
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}
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2014-02-20 15:53:05 +01:00
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2014-07-24 16:08:03 +02:00
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void pwm_stop(pwm_t dev)
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{
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switch (dev) {
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#if PWM_0_EN
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case PWM_0:
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PWM1TCR &= ~(BIT0);
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break;
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#endif
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}
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2014-02-20 15:53:05 +01:00
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}
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2014-07-24 16:08:03 +02:00
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void pwm_poweron(pwm_t dev)
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2014-02-20 15:53:05 +01:00
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{
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switch (dev) {
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#if PWM_0_EN
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case PWM_0:
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2014-07-24 16:08:03 +02:00
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PCONP |= PCPWM1;
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2014-02-20 15:53:05 +01:00
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break;
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#endif
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}
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2014-07-24 16:08:03 +02:00
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}
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2014-02-20 15:53:05 +01:00
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2014-07-24 16:08:03 +02:00
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void pwm_poweroff(pwm_t dev)
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{
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switch (dev) {
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#if PWM_0_EN
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case PWM_0:
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PCONP &= ~(PCPWM1);
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break;
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#endif
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}
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2014-02-20 15:53:05 +01:00
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}
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2014-07-24 16:08:03 +02:00
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2015-10-21 12:42:52 +02:00
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#endif /* (PWM_0_EN || PWM_1_EN) */
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