RIOT/cpu/riscv_common/Makefile.features

ifeq ($(findstring rv32,$(CPU_CORE)),rv32)
  CPU_ARCH := rv32
endif

FEATURES_PROVIDED += arch_32bit
FEATURES_PROVIDED += arch_riscv
FEATURES_PROVIDED += cpp
FEATURES_PROVIDED += libstdcpp
FEATURES_PROVIDED += newlib
FEATURES_PROVIDED += periph_coretimer
FEATURES_PROVIDED += periph_flashpage_aux
FEATURES_PROVIDED += puf_sram
FEATURES_PROVIDED += rust_target
FEATURES_PROVIDED += ssp

# RISC-V toolchain on CI does not work properly with picolibc yet
FEATURES_PROVIDED += picolibc
cpu/riscv,gd32v: add CPU_ARCH, CPU_CORE information adds CPU_ARCH to riscv_common preparing to handle it like cortex-m does adds CPU_CORE to gd32v 2021-09-22 13:02:19 +02:00			`ifeq ($(findstring rv32,$(CPU_CORE)),rv32)`
			`CPU_ARCH := rv32`
			`endif`

riscv_common: Refactor common fe310 code to riscv_common 2020-09-09 21:37:15 +02:00			`FEATURES_PROVIDED += arch_32bit`
			`FEATURES_PROVIDED += arch_riscv`
			`FEATURES_PROVIDED += cpp`
			`FEATURES_PROVIDED += libstdcpp`
			`FEATURES_PROVIDED += newlib`
			`FEATURES_PROVIDED += periph_coretimer`
cpu/riscv_common: allow to define AUX slot on flash 2023-04-24 14:21:47 +02:00			`FEATURES_PROVIDED += periph_flashpage_aux`
cpu/riscv_common: add puf_sram feature 2022-02-16 10:59:14 +01:00			`FEATURES_PROVIDED += puf_sram`
cpu/riscv_common: Enable Rust applications This contains a workaround for https://github.com/rust-lang/rust-bindgen/issues/1555 (withouot which bindgen would fail, with little information helping remedy the cause) 2022-01-14 13:42:32 +01:00			`FEATURES_PROVIDED += rust_target`
riscv_common: Refactor common fe310 code to riscv_common 2020-09-09 21:37:15 +02:00			`FEATURES_PROVIDED += ssp`

			`# RISC-V toolchain on CI does not work properly with picolibc yet`
cpu/riscv_common: remove picolibc from blacklisting in CI 2023-08-07 13:21:31 +02:00			`FEATURES_PROVIDED += picolibc`