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RIOT/cpu/atmega_common/irq_arch.c

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/*
* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
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* 2018 RWTH Aachen, Josua Arndt <jarndt@ias.rwth-aachen.de>
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*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_atmega_common
* @{
*
* @file
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* @brief Implementation of the kernels irq interface
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
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* @author Josua Arndt <jarndt@ias.rwth-aachen.de>
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*
* @}
*/
#include <stdint.h>
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#include <stdio.h>
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#include "irq.h"
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#include "cpu.h"
/**
* @brief Macro returns state of the global interrupt register
*/
static uint8_t __get_interrupt_state(void);
static void __set_interrupt_state(uint8_t state);
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volatile uint8_t __in_isr = 0;
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__attribute__((always_inline)) static inline uint8_t __get_interrupt_state(void)
{
uint8_t sreg;
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__asm__ volatile( "in __tmp_reg__, __SREG__ \n\t"
"mov %0, __tmp_reg__ \n\t"
: "=g"(sreg) );
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return sreg & (1 << 7);
}
__attribute__((always_inline)) inline void __set_interrupt_state(uint8_t state)
{
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__asm__ volatile( "mov r15,%0 \n\t"
"in r16, __SREG__ \n\t"
"cbr r16,7 \n\t"
"or r15,r16 \n\t"
"out __SREG__, r15 \n\t"
:
: "g"(state)
: "r15", "r16", "memory");
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}
/**
* @brief Disable all maskable interrupts
*/
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unsigned int irq_disable(void)
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{
uint8_t mask = __get_interrupt_state();
cli(); /* <-- acts as memory barrier, see doc of avr-libc */
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return (unsigned int) mask;
}
/**
* @brief Enable all maskable interrupts
*/
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unsigned int irq_enable(void)
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{
uint8_t mask = __get_interrupt_state();
sei(); /* <-- acts as memory barrier, see doc of avr-libc */
return mask;
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}
/**
* @brief Restore the state of the IRQ flags
*/
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void irq_restore(unsigned int state)
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{
__set_interrupt_state(state);
}
/**
* @brief See if the current context is inside an ISR
*/
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int irq_is_in(void)
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{
int result = __in_isr;
__asm__ volatile("" ::: "memory");
return result;
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}