RIOT/cpu/stm32/kconfigs/l5/Kconfig

# Copyright (c) 2020 Inria
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
#

config CPU_FAM_L5
    bool
    select CPU_STM32
    select CPU_CORE_CORTEX_M33
    select HAS_CPU_STM32L5
    select HAS_PERIPH_FLASHPAGE
    select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE
    select HAS_PERIPH_FLASHPAGE_PAGEWISE
    select HAS_PERIPH_HWRNG
    select HAS_PERIPH_RTC_MEM
    select HAS_PERIPH_VBAT
    select HAS_PERIPH_WDT
    select HAS_BOOTLOADER_STM32

config CPU_FAM
    default "l5" if CPU_FAM_L5

config HAS_CPU_STM32L5
    bool
    help
        Indicates that the cpu being used belongs to the 'stm32l5' family.
cpu/stm32: adapt Kconfig for stm32l5 2020-10-01 16:59:02 +02:00			`# Copyright (c) 2020 Inria`
			`#`
			`# This file is subject to the terms and conditions of the GNU Lesser`
			`# General Public License v2.1. See the file LICENSE in the top level`
			`# directory for more details.`
			`#`

			`config CPU_FAM_L5`
			`bool`
			`select CPU_STM32`
			`select CPU_CORE_CORTEX_M33`
			`select HAS_CPU_STM32L5`
			`select HAS_PERIPH_FLASHPAGE`
periph/flashpage: Add _in_address_space feature 2022-03-17 19:45:54 +01:00			`select HAS_PERIPH_FLASHPAGE_IN_ADDRESS_SPACE`
stm32: Adapt to flashpage/flashpage_pagewise API 2020-11-09 16:45:22 +01:00			`select HAS_PERIPH_FLASHPAGE_PAGEWISE`
cpu/stm32: adapt Kconfig for stm32l5 2020-10-01 16:59:02 +02:00			`select HAS_PERIPH_HWRNG`
cpu/stm32: add rtc_mem 2021-09-03 11:15:17 +02:00			`select HAS_PERIPH_RTC_MEM`
cpu/stm32: add VBAT for stm32 2021-10-12 13:16:57 +02:00			`select HAS_PERIPH_VBAT`
cpu/stm32: disable periph_wdt for mp1 family In STM32MP1 family, independant watchdogs (IWDG1 and IWDG2) are dedicated to the MPU (Cortex-A7). Thus simply disable the feature for STM32MP1 family. Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com> 2020-11-05 01:06:10 +01:00			`select HAS_PERIPH_WDT`
cpu/stm32: do not build bootloader for mp1 The stm32mp1 family has no flash. The firmware is loaded directly in RAM by stlink programmer or by Cortex-A7 bootloader/OS. Thus bootloader is useless for this family, disable it. Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com> 2020-08-03 00:31:59 +02:00			`select HAS_BOOTLOADER_STM32`
cpu/stm32: adapt Kconfig for stm32l5 2020-10-01 16:59:02 +02:00
			`config CPU_FAM`
			`default "l5" if CPU_FAM_L5`

			`config HAS_CPU_STM32L5`
			`bool`
			`help`
			`Indicates that the cpu being used belongs to the 'stm32l5' family.`