RIOT/cpu/fe310/Makefile.include


USEMODULE += newlib_nano

USEMODULE += newlib_syscalls_fe310
USEMODULE += sifive_drivers_fe310

USEMODULE += periph
USEMODULE += periph_common
USEMODULE += periph_pm

CFLAGS += -Wno-pedantic

include $(RIOTMAKE)/arch/riscv.inc.mk
cpu/fe310: add RISC-V cpu FE310 New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools 2018-04-16 19:03:33 +02:00
			`USEMODULE += newlib_nano`

			`USEMODULE += newlib_syscalls_fe310`
			`USEMODULE += sifive_drivers_fe310`

			`USEMODULE += periph`
cpu/fe310: Add call to periph_init() Until now fe310's cpu_init() was missing a call to periph_init(). This commit adds this call. 2019-01-19 12:38:44 +01:00			`USEMODULE += periph_common`
cpu/fe310: add RISC-V cpu FE310 New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools 2018-04-16 19:03:33 +02:00			`USEMODULE += periph_pm`

make: add hifive1 to BOARD_INSUFFICIENT_MEMORY Added HiFive1 to BOARD_INSUFFICIENT_MEMORY list for examples and tests that are too big to fit build: fixed missing syscall and cpuid failures Added missing syscall stubs for nanostubs and fixed compile error with cpuid periph build: fixed whitespace error build: add hifive1 to more BOARD_INSUFFICIENT_MEMORY doc: fixed doxygen warnings Addressed Doxygen warnings in source file comments doc: more doxygen fixes doc: even more doxygen fixes doc: more changes build: fix pedantic and rdci_simple build failures make: exclude lua 2018-04-16 22:35:32 +02:00			`CFLAGS += -Wno-pedantic`

cpu/fe310: add RISC-V cpu FE310 New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools 2018-04-16 19:03:33 +02:00			`include $(RIOTMAKE)/arch/riscv.inc.mk`