2015-08-06 12:58:08 +02:00
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/*
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* Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_lpc2387
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Kaspar Schleiser <kaspar@schleiser.de>
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*/
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2017-01-18 13:00:05 +01:00
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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2015-08-06 12:58:08 +02:00
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#include "cpu.h"
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#include "periph/dev_enums.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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2015-06-09 12:45:35 +02:00
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#include <stdint.h>
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#include "cpu.h"
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2015-08-06 12:58:08 +02:00
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/**
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* @brief LPC2387 MCU defines
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* @{
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*/
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2015-06-09 12:45:35 +02:00
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#define __IO volatile
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2015-08-06 12:58:08 +02:00
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/**
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* @brief Fast GPIO register definition struct
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*/
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2015-06-09 12:45:35 +02:00
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typedef struct {
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2015-08-06 12:58:08 +02:00
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__IO uint32_t DIR; /**< he */
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uint32_t _reserved[3]; /**< really */
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__IO uint32_t MASK; /**< wants */
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__IO uint32_t PIN; /**< to */
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__IO uint32_t SET; /**< know */
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__IO uint32_t CLR; /**< everything */
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2015-06-09 12:45:35 +02:00
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} FIO_PORT_t;
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#define FIO_PORTS ((FIO_PORT_t*)FIO_BASE_ADDR)
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#define PINSEL ((__IO uint32_t *)(PINSEL_BASE_ADDR))
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#define PINMODE ((__IO uint32_t *)(PINSEL_BASE_ADDR + 0x40))
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int gpio_init_mux(unsigned pin, unsigned mux);
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void gpio_init_states(void);
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2015-09-15 11:45:56 +02:00
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#define GPIO_PIN(port, pin) (port*32 + pin)
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2015-06-09 12:45:35 +02:00
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2016-06-29 21:05:14 +02:00
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#ifndef DOXYGEN
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2015-06-09 12:45:35 +02:00
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#define HAVE_GPIO_FLANK_T
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typedef enum {
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GPIO_FALLING = 1, /**< emit interrupt on falling flank */
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GPIO_RISING = 2, /**< emit interrupt on rising flank */
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GPIO_BOTH = 3 /**< emit interrupt on both flanks */
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} gpio_flank_t;
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2016-06-29 21:05:14 +02:00
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#endif /* ndef DOXYGEN */
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2015-06-09 12:45:35 +02:00
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2015-06-19 11:45:06 +02:00
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/**
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2015-09-03 23:47:59 +02:00
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* @brief Number of available timer channels
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*/
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#define TIMER_CHAN_NUMOF (4U)
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/**
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* @brief Declare needed generic SPI functions
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2015-06-19 11:45:06 +02:00
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* @{
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*/
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2016-11-08 18:25:21 +01:00
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#define PERIPH_SPI_NEEDS_INIT_CS
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
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2015-06-19 11:45:06 +02:00
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#define PERIPH_SPI_NEEDS_TRANSFER_REG
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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2015-08-06 12:58:08 +02:00
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/* @} */
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2016-11-08 18:25:21 +01:00
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/**
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* @brief Override SPI clock speed values
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2017-01-25 14:18:21 +01:00
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* @{
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2016-11-08 18:25:21 +01:00
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*/
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#define HAVE_SPI_CLK_T
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typedef enum {
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SPI_CLK_100KHZ = 100, /**< drive the SPI bus with 100KHz */
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SPI_CLK_400KHZ = 400, /**< drive the SPI bus with 400KHz */
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SPI_CLK_1MHZ = 1000, /**< drive the SPI bus with 1MHz */
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SPI_CLK_5MHZ = 5000, /**< drive the SPI bus with 5MHz */
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SPI_CLK_10MHZ = 10000 /**< drive the SPI bus with 10MHz */
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} spi_clk_t;
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2017-01-25 14:18:21 +01:00
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/** @} */
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2016-11-08 18:25:21 +01:00
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2015-08-06 12:58:08 +02:00
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/* @} */
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#ifdef __cplusplus
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}
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#endif
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2017-01-18 13:00:05 +01:00
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#endif /* PERIPH_CPU_H */
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2015-06-19 11:45:06 +02:00
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/** @} */
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