2018-05-14 23:55:15 +02:00
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/*
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* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
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* 2017 RWTH Aachen, Josua Arndt
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* 2018 Matthew Blue
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_atmega_common
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* @{
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*
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* @file
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* @brief Implementation of the CPU initialization
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*
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* @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
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* @author Steffen Robertz <steffen.robertz@rwth-aachen.de>
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* @author Josua Arndt <jarndt@ias.rwth-aachen.de>
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* @author Matthew Blue <matthew.blue.neuro@gmail.com>
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* @author Francisco Acosta <francisco.acosta@inria.fr>
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* @}
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*/
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#include <avr/io.h>
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#include <avr/wdt.h>
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#include <avr/pgmspace.h>
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#include "cpu.h"
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#include "board.h"
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#include "periph/init.h"
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#include "panic.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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/*
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* Since atmega MCUs do not feature a software reset, the watchdog timer
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* is being used. It will be set to the shortest time and then force a
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* reset. Therefore the MCUSR register needs to be resetted as fast as
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* possible.
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* Which means in the bootloader or in the following init0 if no bootloader is used.
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* Bootloader resets watchdog and pass MCUSR in r2 (e.g. Optiboot) in order to pass
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* information about the reset cause to the application.
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* When no Bootloader is used the watchdog will be disabled in the init0 section.
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* When a software reset was triggered, r3 will contain 0xAA.
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* In order to prevent changes to the values from the .init section, MCUSR and r3
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* are saved in the .init0 section
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*/
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uint8_t mcusr_mirror __attribute__((section(".noinit")));
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uint8_t soft_rst __attribute__((section(".noinit")));
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void get_mcusr(void) __attribute__((naked)) __attribute__((section(".init0")));
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void get_mcusr(void)
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{
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/* save soft reset flag set in reset routine */
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__asm__ __volatile__("mov %0, r3\n" : "=r" (soft_rst) :);
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#ifdef BOOTLOADER_CLEARS_WATCHDOG_AND_PASSES_MCUSR
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/* save the reset flags passed from the bootloader */
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__asm__ __volatile__("mov %0, r2\n" : "=r" (mcusr_mirror) :);
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#else
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/* save the reset flags */
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#ifdef MCUCSR
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mcusr_mirror = MCUCSR;
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MCUSR = 0;
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#else
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mcusr_mirror = MCUSR;
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MCUSR = 0;
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#endif
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wdt_disable();
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#endif
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}
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void _reset_cause(void)
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{
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if (mcusr_mirror & (1 << PORF)) {
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DEBUG("Power-on reset.\n");
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}
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if (mcusr_mirror & (1 << EXTRF)) {
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DEBUG("External reset!\n");
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}
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if (mcusr_mirror & (1 << BORF)) {
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DEBUG("Brownout reset!\n");
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}
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if (mcusr_mirror & (1 << WDRF)) {
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if (soft_rst & 0xAA) {
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DEBUG("Software reset!\n");
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} else {
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DEBUG("Watchdog reset!\n");
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}
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}
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#if !defined (CPU_ATMEGA328P)
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if (mcusr_mirror & (1 << JTRF)) {
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DEBUG("JTAG reset!\n");
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}
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#endif
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}
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void cpu_init(void)
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{
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_reset_cause();
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wdt_reset(); /* should not be nececessary as done in bootloader */
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wdt_disable(); /* but when used without bootloader this is needed */
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2019-04-10 10:18:43 +02:00
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/* Initialize stdio before periph_init() to allow use of DEBUG() there */
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#ifdef MODULE_AVR_LIBC_EXTRA
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atmega_stdio_init();
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#endif
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2018-05-14 23:55:15 +02:00
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/* Initialize peripherals for which modules are included in the makefile.*/
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/* spi_init */
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/* rtc_init */
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/* hwrng_init */
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periph_init();
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}
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2019-02-03 18:59:27 +01:00
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struct __freelist {
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size_t size;
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struct __freelist *next;
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};
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extern struct __freelist *__flp;
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extern char *__malloc_heap_start;
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extern char *__malloc_heap_end;
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extern char *__brkval;
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void heap_stats(void)
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{
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int heap_size = __malloc_heap_end - __malloc_heap_start;
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int free = __malloc_heap_end - __brkval;
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struct __freelist *fp;
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for (fp = __flp; fp; fp = fp->next) {
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free += fp->size;
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}
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printf("heap: %d (used %d, free %d) [bytes]\n",
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heap_size, heap_size - free, free);
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}
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2018-05-14 23:55:15 +02:00
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/* This is a vector which is aliased to __vector_default,
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* the vector executed when an ISR fires with no accompanying
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* ISR handler. This may be used along with the ISR() macro to
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* create a catch-all for undefined but used ISRs for debugging
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* purposes.
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* SCIRQS – Symbol Counter Interrupt Status Register
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* BATMON – Battery Monitor Control and Status Register
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* IRQ_STATUS /1 – Transceiver Interrupt Status Register
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* EIFR – External Interrupt Flag Register
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* PCIFR – Pin Change Interrupt Flag Register
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*/
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ISR(BADISR_vect)
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{
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_reset_cause();
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#if defined (CPU_ATMEGA256RFR2)
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printf("IRQ_STATUS %#02x\nIRQ_STATUS1 %#02x\n",
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(unsigned int)IRQ_STATUS, (unsigned int)IRQ_STATUS1);
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printf("SCIRQS %#02x\nBATMON %#02x\n", (unsigned int)SCIRQS, (unsigned int)BATMON);
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printf("EIFR %#02x\nPCIFR %#02x\n", (unsigned int)EIFR, (unsigned int)PCIFR);
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#endif
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#ifdef LED_PANIC
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/* Use LED light to signal ERROR. */
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LED_PANIC;
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#endif
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core_panic(PANIC_GENERAL_ERROR, PSTR("FATAL ERROR: BADISR_vect called, unprocessed Interrupt.\n"
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"STOP Execution.\n"));
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}
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2019-09-28 00:02:16 +02:00
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#if defined(CPU_ATMEGA128RFA1) || defined (CPU_ATMEGA256RFR2)
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2018-05-14 23:55:15 +02:00
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ISR(BAT_LOW_vect, ISR_BLOCK)
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{
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__enter_isr();
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DEBUG("BAT_LOW\n");
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__exit_isr();
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}
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#endif
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