2020-05-29 19:25:11 +02:00
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# Copyright (c) 2020 HAW Hamburg
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#
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# This file is subject to the terms and conditions of the GNU Lesser
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# General Public License v2.1. See the file LICENSE in the top level
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# directory for more details.
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#
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2021-02-05 23:09:29 +01:00
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config HAS_CPU_CORE_ATMEGA
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bool
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select CPU_ARCH_AVR8
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select HAS_CPP
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2020-05-29 19:25:11 +02:00
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config CPU_COMMON_ATMEGA
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bool
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2021-02-05 23:09:29 +01:00
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select HAS_CPU_CORE_ATMEGA
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2020-05-29 19:25:11 +02:00
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select HAS_ATMEGA_PCINT0
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2021-02-15 11:24:05 +01:00
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select HAS_DBGPIN
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2020-05-29 19:25:11 +02:00
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select HAS_PERIPH_CPUID
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select HAS_PERIPH_EEPROM
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select HAS_PERIPH_GPIO
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select HAS_PERIPH_GPIO_IRQ
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select HAS_PERIPH_PM
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2021-05-04 17:27:20 +02:00
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select HAS_PERIPH_RTC_MS
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2021-03-04 20:04:11 +01:00
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select HAS_PERIPH_RTT_SET_COUNTER
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2020-05-29 19:25:11 +02:00
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select HAS_PERIPH_TIMER_PERIODIC
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2021-01-13 20:48:29 +01:00
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select HAS_PERIPH_RTT_OVERFLOW
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2020-05-29 19:25:11 +02:00
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select HAS_PERIPH_WDT
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select HAS_PUF_SRAM
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2020-06-17 12:54:18 +02:00
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# Define ATMega128 family here as it is used by different CPUs
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config CPU_FAM_ATMEGA128
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bool
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select CPU_COMMON_ATMEGA
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select CPU_CORE_AVR
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2020-05-29 19:25:11 +02:00
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## Common CPU symbols
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2020-06-17 12:54:18 +02:00
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config CPU_FAM
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default "atmega128" if CPU_FAM_ATMEGA128
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2020-05-29 19:25:11 +02:00
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## Declaration of specific features
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config HAS_ATMEGA_PCINT0
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bool
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help
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Indicates that the Pin Change Interrupt bank 0 is present.
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config HAS_ATMEGA_PCINT1
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bool
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help
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Indicates that the Pin Change Interrupt bank 1 is present.
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config HAS_ATMEGA_PCINT2
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bool
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help
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Indicates that the Pin Change Interrupt bank 2 is present.
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config HAS_ATMEGA_PCINT3
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bool
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help
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Indicates that the Pin Change Interrupt bank 3 is present.
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2020-09-24 15:21:07 +02:00
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config ERROR_MODULES_CONFLICT
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default "On ATmega, the RTC and RTT use to the same hardware timer." if MODULE_PERIPH_RTC && MODULE_PERIPH_RTT
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depends on CPU_COMMON_ATMEGA
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2021-01-02 16:36:20 +01:00
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source "$(RIOTCPU)/avr8_common/Kconfig"
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