2017-02-09 13:22:28 +01:00
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/*
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* Copyright 2016, Imagination Technologies Limited and/or its
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* affiliated group companies.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*
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*/
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/**
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2018-07-26 11:59:28 +02:00
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* @ingroup boards_mips-malta
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2017-02-09 13:22:28 +01:00
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* @{
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*
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* @file
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* @brief peripheral configuration for the MIPS Malta FPGA system
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*
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* @author Neil Jones <neil.jones@imgtec.com>
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*/
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2017-05-23 18:19:52 +02:00
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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2017-02-09 13:22:28 +01:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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2017-04-10 19:04:32 +02:00
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* @name Timer definitions
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2017-02-09 13:22:28 +01:00
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* @{
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*/
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#define TIMER_NUMOF (1)
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#define TIMER_0_CHANNELS (3)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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2017-05-23 18:19:52 +02:00
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#endif /* PERIPH_CONF_H */
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2017-02-09 13:22:28 +01:00
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/** @} */
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