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RIOT/cpu/mips32r2_generic/include/periph_cpu.h

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cpu: mips: Add support for mips32r2 cpu/mips32r2_common adds base architecture support for mips32r2 cores it can be built in it own right as a 'CPU', but is dependant on a bootloader (like u-boot) to have bootstrapped the system, this has been tested on a 'malta' FPGA system (BOARD=mips-malta) with various mips32r2 compliant cores (interAptiv, P5600, etc).
2017-02-09 13:18:44 +01:00
/*
* Copyright 2016, Imagination Technologies Limited and/or its
* affiliated group companies.
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/* This file must exist to get timer code to build */
/* No peripherals I/O via JTAG or Bootloader using UHI */
pm: fix weak-based default implementations Instead of using `weak` function definitions, this PR handles default implementations using `PROVIDES_x` defines, allowing for cpus/pm realted modules to use their own implementations.
2017-10-12 16:20:15 +02:00
#ifndef PERIPH_CPU_H
#define PERIPH_CPU_H
cpu: mips: Add support for mips32r2 cpu/mips32r2_common adds base architecture support for mips32r2 cores it can be built in it own right as a 'CPU', but is dependant on a bootloader (like u-boot) to have bootstrapped the system, this has been tested on a 'malta' FPGA system (BOARD=mips-malta) with various mips32r2 compliant cores (interAptiv, P5600, etc).
2017-02-09 13:18:44 +01:00
#ifdef __cplusplus
extern "C" {
#endif
pm: fix weak-based default implementations Instead of using `weak` function definitions, this PR handles default implementations using `PROVIDES_x` defines, allowing for cpus/pm realted modules to use their own implementations.
2017-10-12 16:20:15 +02:00
/**
* @name Power management configuration
* @{
*/
#define PROVIDES_PM_SET_LOWEST
/** @} */
cpu/mips32r2_generic: Add PERIPH_TIMER_PROVIDES_SET mips32r2_common already implements timer_set so it should not be provided by periph_common/timer to avoid multiple definition errors currently hidden by the linker. The firmware was using the one from `mips32r2_common` before (binary checked). So behaviour is identical.
2018-03-13 14:16:38 +01:00
/**
* @brief Prevent shared timer functions from being used
*/
#define PERIPH_TIMER_PROVIDES_SET 1
cpu: mips: Add support for mips32r2 cpu/mips32r2_common adds base architecture support for mips32r2 cores it can be built in it own right as a 'CPU', but is dependant on a bootloader (like u-boot) to have bootstrapped the system, this has been tested on a 'malta' FPGA system (BOARD=mips-malta) with various mips32r2 compliant cores (interAptiv, P5600, etc).
2017-02-09 13:18:44 +01:00
#ifdef __cplusplus
}
#endif
pm: fix weak-based default implementations Instead of using `weak` function definitions, this PR handles default implementations using `PROVIDES_x` defines, allowing for cpus/pm realted modules to use their own implementations.
2017-10-12 16:20:15 +02:00
#endif /* PERIPH_CPU_H */
/** @} */
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