2014-10-22 15:49:49 +02:00
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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2015-02-12 13:42:11 +01:00
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* @ingroup boards_openmote
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2014-10-22 15:49:49 +02:00
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the OpenMote board
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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2015-04-23 05:00:54 +02:00
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#ifndef PERIPH_CONF_H_
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#define PERIPH_CONF_H_
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2014-10-22 15:49:49 +02:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock system configuration
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* @{
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*/
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#define CLOCK_CORECLOCK (32000000U) /* desired core clock frequency, 32MHz */
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/** @} */
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/**
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* @name Timer configuration
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* @{
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*/
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#define TIMER_NUMOF (4U)
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#define TIMER_0_EN 1
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#define TIMER_1_EN 1
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#define TIMER_2_EN 1
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#define TIMER_3_EN 1
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#define TIMER_IRQ_PRIO 1
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/* Timer 0 configuration */
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#define TIMER_0_DEV GPTIMER0
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#define TIMER_0_CHANNELS NUM_CHANNELS_PER_GPTIMER
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#define TIMER_0_MAX_VALUE 0xffffffff
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#define TIMER_0_IRQn_1 GPTIMER_0A_IRQn
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#define TIMER_0_IRQn_2 GPTIMER_0B_IRQn
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#define TIMER_0_ISR_1 isr_timer0_chan0
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#define TIMER_0_ISR_2 isr_timer0_chan1
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/* Timer 1 configuration */
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#define TIMER_1_DEV GPTIMER1
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#define TIMER_1_CHANNELS NUM_CHANNELS_PER_GPTIMER
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#define TIMER_1_MAX_VALUE 0xffffffff
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#define TIMER_1_IRQn_1 GPTIMER_1A_IRQn
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#define TIMER_1_IRQn_2 GPTIMER_1B_IRQn
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#define TIMER_1_ISR_1 isr_timer1_chan0
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#define TIMER_1_ISR_2 isr_timer1_chan1
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/* Timer 2 configuration */
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#define TIMER_2_DEV GPTIMER2
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#define TIMER_2_CHANNELS NUM_CHANNELS_PER_GPTIMER
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#define TIMER_2_MAX_VALUE 0xffffffff
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#define TIMER_2_IRQn_1 GPTIMER_2A_IRQn
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#define TIMER_2_IRQn_2 GPTIMER_2B_IRQn
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#define TIMER_2_ISR_1 isr_timer2_chan0
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#define TIMER_2_ISR_2 isr_timer2_chan1
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/* Timer 3 configuration */
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#define TIMER_3_DEV GPTIMER3
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#define TIMER_3_CHANNELS NUM_CHANNELS_PER_GPTIMER
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#define TIMER_3_MAX_VALUE 0xffffffff
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#define TIMER_3_IRQn_1 GPTIMER_3A_IRQn
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#define TIMER_3_IRQn_2 GPTIMER_3B_IRQn
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#define TIMER_3_ISR_1 isr_timer3_chan0
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#define TIMER_3_ISR_2 isr_timer3_chan1
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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#define UART_NUMOF (1U)
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#define UART_0_EN 1
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#define UART_IRQ_PRIO 1
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/* UART 0 device configuration */
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#define UART_0_DEV UART0
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#define UART_0_IRQ UART0_IRQn
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#define UART_0_ISR isr_uart0
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/* UART 0 pin configuration */
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#define UART_0_TX_PIN GPIO_PA1
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#define UART_0_RX_PIN GPIO_PA0
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/** @} */
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/**
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* @name Random Number Generator configuration
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* @{
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*/
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#define RANDOM_NUMOF 1
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/** @} */
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/**
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* @name GPIO configuration
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* @{
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*/
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#define GPIO_0_EN 1
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#define GPIO_1_EN 1
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#define GPIO_2_EN 1
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#define GPIO_3_EN 1
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#define GPIO_4_EN 1
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#define GPIO_5_EN 1
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#define GPIO_6_EN 1
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#define GPIO_7_EN 1
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#define GPIO_8_EN 1
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#define GPIO_9_EN 1
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#define GPIO_10_EN 1
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#define GPIO_11_EN 1
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#define GPIO_IRQ_PRIO 1
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2015-07-04 11:33:11 +02:00
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/* GPIO channel configuration */
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#define GPIO_0_PIN GPIO_PA0
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#define GPIO_1_PIN GPIO_PA1
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#define GPIO_2_PIN GPIO_PA2
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#define GPIO_3_PIN GPIO_PA3
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#define GPIO_4_PIN GPIO_PA4
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#define GPIO_5_PIN GPIO_PA5
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#define GPIO_6_PIN GPIO_PA6
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#define GPIO_7_PIN GPIO_PA7
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#define GPIO_8_PIN GPIO_PB0
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#define GPIO_9_PIN GPIO_PB1
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#define GPIO_10_PIN GPIO_PB2
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#define GPIO_11_PIN GPIO_PB3
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2014-10-22 15:49:49 +02:00
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/** @} */
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#ifdef __cplusplus
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} /* end extern "C" */
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#endif
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2015-04-23 05:00:54 +02:00
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#endif /* PERIPH_CONF_H_ */
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2014-10-22 15:49:49 +02:00
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/** @} */
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