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76 lines
3.7 KiB
C
76 lines
3.7 KiB
C
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/**
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* \file
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*
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* \brief Instance description for CCL
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*
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* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifndef _SAML21_CCL_INSTANCE_
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#define _SAML21_CCL_INSTANCE_
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/* ========== Register definition for CCL peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_CCL_CTRL (0x43001C00U) /**< \brief (CCL) Control */
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#define REG_CCL_SEQCTRL0 (0x43001C04U) /**< \brief (CCL) SEQ Control x 0 */
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#define REG_CCL_SEQCTRL1 (0x43001C05U) /**< \brief (CCL) SEQ Control x 1 */
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#define REG_CCL_LUTCTRL0 (0x43001C08U) /**< \brief (CCL) LUT Control x 0 */
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#define REG_CCL_LUTCTRL1 (0x43001C0CU) /**< \brief (CCL) LUT Control x 1 */
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#define REG_CCL_LUTCTRL2 (0x43001C10U) /**< \brief (CCL) LUT Control x 2 */
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#define REG_CCL_LUTCTRL3 (0x43001C14U) /**< \brief (CCL) LUT Control x 3 */
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#else
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#define REG_CCL_CTRL (*(RwReg8 *)0x43001C00U) /**< \brief (CCL) Control */
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#define REG_CCL_SEQCTRL0 (*(RwReg8 *)0x43001C04U) /**< \brief (CCL) SEQ Control x 0 */
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#define REG_CCL_SEQCTRL1 (*(RwReg8 *)0x43001C05U) /**< \brief (CCL) SEQ Control x 1 */
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#define REG_CCL_LUTCTRL0 (*(RwReg *)0x43001C08U) /**< \brief (CCL) LUT Control x 0 */
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#define REG_CCL_LUTCTRL1 (*(RwReg *)0x43001C0CU) /**< \brief (CCL) LUT Control x 1 */
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#define REG_CCL_LUTCTRL2 (*(RwReg *)0x43001C10U) /**< \brief (CCL) LUT Control x 2 */
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#define REG_CCL_LUTCTRL3 (*(RwReg *)0x43001C14U) /**< \brief (CCL) LUT Control x 3 */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* ========== Instance parameters for CCL peripheral ========== */
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#define CCL_GCLK_ID 34 // GCLK index for CCL
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#define CCL_IO_NUM 12 // Numer of input pins
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#define CCL_LUT_NUM 4 // Number of LUT in a CCL
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#define CCL_SEQ_NUM 2 // Number of SEQ in a CCL
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#endif /* _SAML21_CCL_INSTANCE_ */
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