RIOT/pkg/qdsa/Makefile.include

ifneq (,$(filter cortex-m23 cortex-m0%,$(CPU_CORE)))
  QDSA_IMPL ?= arm
else
  ifneq (,$(filter arch_avr8,$(FEATURES_USED)))
    QDSA_IMPL ?= avr
  else
    QDSA_IMPL ?= cref
  endif
endif

export QDSA_IMPL

INCLUDES += -I$(PKGDIRBASE)/qdsa/$(QDSA_IMPL)

ifeq (cortex-m0plus,$(CPU_CORE))
  # There are problems with the LLVM assembler and the Cortex-M0+ instruction
  # set with this package
  TOOLCHAINS_BLACKLIST += llvm
endif
cpu: Rename CPU_ARCH to CPU_CORE 2020-06-10 13:11:32 +02:00			`ifneq (,$(filter cortex-m23 cortex-m0%,$(CPU_CORE)))`
pkg/qDSA: initial commit 2018-03-14 17:31:57 +01:00			`QDSA_IMPL ?= arm`
			`else`
pkg/qDSA: fix backend selection log qDSA as optimized implementations for AVR. The logic to select the optimized backend predates the architecture features and uses some hand crafted logic. This updates the logic to select the backend based on the boards architecture using the feature system instead. 2021-03-08 15:45:50 +01:00			`ifneq (,$(filter arch_avr8,$(FEATURES_USED)))`
			`QDSA_IMPL ?= avr`
			`else`
			`QDSA_IMPL ?= cref`
			`endif`
pkg/qDSA: initial commit 2018-03-14 17:31:57 +01:00			`endif`

			`export QDSA_IMPL`

pkg/qdsa: force qdsa to lowercase 2021-06-15 12:01:06 +02:00			`INCLUDES += -I$(PKGDIRBASE)/qdsa/$(QDSA_IMPL)`
qDSA: blacklist LLVM/clang 2018-08-16 20:55:22 +02:00
cpu: Rename CPU_ARCH to CPU_CORE 2020-06-10 13:11:32 +02:00			`ifeq (cortex-m0plus,$(CPU_CORE))`
qDSA: blacklist LLVM/clang 2018-08-16 20:55:22 +02:00			`# There are problems with the LLVM assembler and the Cortex-M0+ instruction`
			`# set with this package`
			`TOOLCHAINS_BLACKLIST += llvm`
			`endif`