2021-11-18 17:17:04 +01:00
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# Copyright (c) 2021 HAW Hamburg
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#
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# This file is subject to the terms and conditions of the GNU Lesser
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# General Public License v2.1. See the file LICENSE in the top level
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# directory for more details.
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#
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if TEST_KCONFIG
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config MODULE_ESP_RTC_TIMER_32K
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bool
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depends on HAS_ESP_RTC_TIMER_32K
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2022-06-08 16:47:33 +02:00
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default y if MODULE_PERIPH_RTT
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2021-11-18 17:17:04 +01:00
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help
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Use RTC timer with external 32.768 kHz crystal as RTT.
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config MODULE_PERIPH_RTT_HW_SYS
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bool
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default y if MODULE_PERIPH_RTT
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config MODULE_PERIPH_RTT_HW_RTC
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bool
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default y if MODULE_PERIPH_RTT
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2022-02-04 08:23:45 +01:00
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config MODULE_ESP_HW_COUNTER
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2022-07-18 09:52:26 +02:00
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bool "Use hardware counter as low-level timer peripheral"
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2022-06-18 18:57:19 +02:00
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depends on HAS_ESP_HW_COUNTER
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2022-02-04 08:23:45 +01:00
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depends on MODULE_PERIPH_TIMER
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2022-07-18 09:52:26 +02:00
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help
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ESP SoCs with Xtensa cores typically have a set of CCOUNT and CCOMPARE
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registers that can be used as low-level timer peripherals. Use this
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option to enable these CCOUNT and CCOMPARE register as low-level timer.
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2022-02-04 08:23:45 +01:00
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2021-11-18 17:17:04 +01:00
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endif # TEST_KCONFIG
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