RIOT/cpu/qn908x/Makefile.include

# Add search path for linker scripts
LINKFLAGS += -L$(RIOTCPU)/$(CPU)/ldscripts
LINKER_SCRIPT = qn908x.ld

# Internal FLASH memory is located at address 0x0100000, aliased to address
# 0x2100000 and can also be aliased to address 0, which is done by the
# pre_startup() function in cpu/qn908x/isr_qn908x.c. The address 0 can be also
# be remapped to RAM instead, and the FLASH can be turned completely off to save
# power, thus linking all the code based on address 0 could make it easier in
# the future to provide a low-power mode where portions of the code execute
# from RAM only during this low-power mode. However, linking all the code at
# address 0 makes it more difficult to attach gdb after a 'reset halt' but
# before the FLASH is mapped to 0 by pre_startup() since it can't place a
# breakpoint at any function in the FLASH alias at 0 until it is mapped.
# This default value of 0x01000000 makes it possible to place breakpoints across
# reboots, but it can be override from the board if needed. When setting
# ROM_START_ADDR to 0 the IMAGE_OFFSET must be set to 0x01000000 to allow
# flashing at the right location.
ROM_START_ADDR ?= 0x01000000
# SRAM is actually at 0x04000000 but it is also aliased to 0x20000000.
RAM_BASE_ADDR  = 0x20000000
RAM_START_ADDR = $(RAM_BASE_ADDR)

# The only QN908x chips available have 512K flash, although it seems possible to
# have 256K versions.
ROM_LEN ?= 512K
RAM_LEN ?= 128K

CFLAGS += \
  -DQN908X_ROM_START_ADDR=$(ROM_START_ADDR)
  #

# Vendor submodules are all bundled in the vendor module, and they include
# some files from the include/vendor directory directly so we need to add that
# include path here.
PSEUDOMODULES += vendor_%
INCLUDES += -I$(RIOTCPU)/$(CPU)/include/vendor

include $(RIOTMAKE)/arch/cortexm.inc.mk
cpu/qn908x: Initial minimal support for NXP QN908x CPUs. The NXP QN908x CPU family is a Cortex-M4F CPU with integrated USB, Bluetooth Low Energy and in some variants NFC. This patch implements the first steps for having support for this CPU. While the QN908x can be considered the successor of similar chips from NXP like the KW41Z when looking at the feature set, the internal architecture, boot image format and CPU peripherals don't match those in the Kinetis line. Therefore, this patch creates a new directory for just the QN908x chip under cpu/qn908x. The minimal set of peripherals are implemented in this patch to allow the device to boot and enable a GPIO: the gpio and wdt peripheral modules only. The wdt driver is required to boot and disable the wdt. On reset, the wdt is disabled by the chip, however the QN908x bootloader stored in the internal ROM enables the wdt and sets a timer to reboot after 10 seconds, therefore it is needed to disable the wdt in RIOT OS soon after booting. This patch sets it up such that when no periph_wdt module is used the Watchdog is disabled, but if the periph_wdt is used it must be configured (initialized) within the first 10 seconds. Tests performed: Defined a custom board for this CPU and compiled a simple application that blinks some LEDs. Manually tested with periph_wdt and with periph_wdt_cb as well. 2020-04-10 14:26:17 +02:00			`# Add search path for linker scripts`
			`LINKFLAGS += -L$(RIOTCPU)/$(CPU)/ldscripts`
			`LINKER_SCRIPT = qn908x.ld`

			`# Internal FLASH memory is located at address 0x0100000, aliased to address`
			`# 0x2100000 and can also be aliased to address 0, which is done by the`
			`# pre_startup() function in cpu/qn908x/isr_qn908x.c. The address 0 can be also`
			`# be remapped to RAM instead, and the FLASH can be turned completely off to save`
			`# power, thus linking all the code based on address 0 could make it easier in`
			`# the future to provide a low-power mode where portions of the code execute`
			`# from RAM only during this low-power mode. However, linking all the code at`
			`# address 0 makes it more difficult to attach gdb after a 'reset halt' but`
			`# before the FLASH is mapped to 0 by pre_startup() since it can't place a`
			`# breakpoint at any function in the FLASH alias at 0 until it is mapped.`
			`# This default value of 0x01000000 makes it possible to place breakpoints across`
			`# reboots, but it can be override from the board if needed. When setting`
			`# ROM_START_ADDR to 0 the IMAGE_OFFSET must be set to 0x01000000 to allow`
			`# flashing at the right location.`
			`ROM_START_ADDR ?= 0x01000000`
			`# SRAM is actually at 0x04000000 but it is also aliased to 0x20000000.`
			`RAM_BASE_ADDR = 0x20000000`
			`RAM_START_ADDR = $(RAM_BASE_ADDR)`

			`# The only QN908x chips available have 512K flash, although it seems possible to`
			`# have 256K versions.`
			`ROM_LEN ?= 512K`
			`RAM_LEN ?= 128K`

			`CFLAGS += \`
			`-DQN908X_ROM_START_ADDR=$(ROM_START_ADDR)`
			`#`

			`# Vendor submodules are all bundled in the vendor module, and they include`
			`# some files from the include/vendor directory directly so we need to add that`
			`# include path here.`
			`PSEUDOMODULES += vendor_%`
			`INCLUDES += -I$(RIOTCPU)/$(CPU)/include/vendor`

			`include $(RIOTMAKE)/arch/cortexm.inc.mk`