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70 lines
2.4 KiB
Plaintext
70 lines
2.4 KiB
Plaintext
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/*
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* Copyright (C) 2020 iosabi
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @addtogroup cpu_qn908x
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* @{
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*
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* @file
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* @brief Sections definitions for the NXP QN908x MCUs
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*
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* @author iosabi <iosabi@protonmail.com>
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*
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* This linker script organizes the flash headers to generate a "Legacy" image
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* as described in the "Boot Process" section of the QN908x user manual. A
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* legacy image contains an "Image vector table" which is the standard ARM
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* vector table with some special values in the reserved fields. In particular,
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* this needs a to have a valid checksum at address 0x1c to be considered a
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* valid image by the bootloader, which is not set by the build process.
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*
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* @}
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*/
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OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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_vectors_length = 0x114;
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/* The Flash lock and protect descriptor occupies the last flash page of 0x800
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* bytes. See "Flash lock and protection" protection section. */
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_flash_lock_length = 0x800;
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INCLUDE cortexm_rom_offset.ld
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MEMORY
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{
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/* Note: What we call "rom" here is the flash region for consistency with
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* the rest of the RIOT build system naming. There is a 256 kB ROM memory in
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* the QN908x holding the bootloader and Bluetooth stack that can't be
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* modified by the user.
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*/
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vectors : ORIGIN = _rom_start_addr + _rom_offset, LENGTH = _vectors_length
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rom (rx) : ORIGIN = _rom_start_addr + _rom_offset + _vectors_length, LENGTH = _fw_rom_length - _vectors_length - _flash_lock_length
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ram (!rx) : ORIGIN = _ram_start_addr, LENGTH = _ram_length
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}
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SECTIONS
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{
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/* "Image vector table" 0x000-0x114, defined in the "Boot process" section,
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* must have exactly this size, otherwise we configured something wrong.
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*/
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.vectors :
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{
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PROVIDE(_isr_vectors = .);
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KEEP(*(SORT(.vector*)))
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} > vectors
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ASSERT (SIZEOF(.vectors) == _vectors_length,
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"Image vector table size mismatch.")
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ASSERT (ADDR(.vectors) == _rom_start_addr + _rom_offset,
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"Image vector table must start at the beginning of the flash")
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ASSERT (LOADADDR(.vectors) == _rom_start_addr + _rom_offset,
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"Image vector table must start at the beginning of the flash")
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}
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INCLUDE cortexm_base.ld
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