mirror of
https://github.com/RIOT-OS/RIOT.git
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208 lines
7.6 KiB
C
208 lines
7.6 KiB
C
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup board_iot-lab_M3
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* @{
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*
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* @file periph_conf.h
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* @brief Peripheral MCU configuration for the iot-lab_M3 board
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*
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* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
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*/
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#ifndef __PERIPH_CONF_H
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#define __PERIPH_CONF_H
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/**
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* @brief Timer configuration
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* @{
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*/
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#define TIMER_NUMOF (2U)
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#define TIMER_0_EN 1
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#define TIMER_1_EN 2
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/* Timer 0 configuration */
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#define TIMER_0_DEV TIM2
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#define TIMER_0_CHANNELS 4
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#define TIMER_0_PRESCALER (36000U)
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#define TIMER_0_MAX_VALUE (0xffff)
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#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
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#define TIMER_0_ISR isr_tim2
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#define TIMER_0_IRQ_CHAN TIM2_IRQn
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#define TIMER_0_IRQ_PRIO 1
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/* Timer 1 configuration */
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#define TIMER_1_DEV TIM3
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#define TIMER_1_CHANNELS 2
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#define TIMER_1_PRESCALER (36000U)
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#define TIMER_1_MAX_VALUE (0xffff)
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#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM3EN)
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#define TIMER_1_ISR isr_tim3
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#define TIMER_1_IRQ_CHAN TIM3_IRQn
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#define TIMER_1_IRQ_PRIO 1
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/** @} */
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/**
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* @brief UART configuration
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*/
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#define UART_NUMOF (2U)
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#define UART_0_EN 1
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#define UART_1_EN 0
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#define UART_IRQ_PRIO 1
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/* UART 0 device configuration */
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#define UART_0_DEV USART1
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#define UART_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_USART1EN)
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#define UART_0_IRQ USART1_IRQn
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#define UART_0_ISR isr_usart1
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/* UART 0 pin configuration */
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#define UART_0_PORT GPIOA
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#define UART_0_PORT_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
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#define UART_0_RX_PIN 10
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#define UART_0_TX_PIN 9
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#define UART_0_AF 0
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/* UART 1 device configuration */
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#define UART_1_DEV USART2
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#define UART_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART2EN)
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#define UART_1_IRQ USART2_IRQn
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#define UART_1_ISR isr_usart2
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/* UART 1 pin configuration */
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#define UART_1_PORT GPIOA
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#define UART_1_PORT_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
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#define UART_1_RX_PIN 3
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#define UART_1_TX_PIN 2
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#define UART_1_AF 1
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/**
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* @brief GPIO configuration
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*/
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#define GPIO_NUMOF 12
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#define GPIO_0_EN 1
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#define GPIO_1_EN 1
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#define GPIO_2_EN 1
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#define GPIO_3_EN 1
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#define GPIO_4_EN 1
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#define GPIO_5_EN 1
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#define GPIO_6_EN 1
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#define GPIO_7_EN 1
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#define GPIO_8_EN 1
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#define GPIO_9_EN 1
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#define GPIO_10_EN 1
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#define GPIO_11_EN 1
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#define GPIO_IRQ_PRIO 1
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/* IRQ config */
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#define GPIO_IRQ_0 GPIO_0
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#define GPIO_IRQ_1 GPIO_1
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#define GPIO_IRQ_2 GPIO_0 /* not configured */
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#define GPIO_IRQ_3 GPIO_0 /* not configured */
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#define GPIO_IRQ_4 GPIO_2
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#define GPIO_IRQ_5 GPIO_3
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#define GPIO_IRQ_6 GPIO_4
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#define GPIO_IRQ_7 GPIO_5
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#define GPIO_IRQ_8 GPIO_0 /* not configured */
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#define GPIO_IRQ_9 GPIO_0 /* not configured */
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#define GPIO_IRQ_10 GPIO_6
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#define GPIO_IRQ_11 GPIO_7
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#define GPIO_IRQ_12 GPIO_8
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#define GPIO_IRQ_13 GPIO_9
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#define GPIO_IRQ_14 GPIO_10
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#define GPIO_IRQ_15 GPIO_11
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/* GPIO channel 0 config */
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#define GPIO_0_PORT GPIOA /* Used for user button 1 */
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#define GPIO_0_PIN 0
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#define GPIO_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
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#define GPIO_0_EXTI_CFG() (AFIO->EXTICR[GPIO_0_PIN>>0x02] |= (((uint32_t)0x00) << (0x04 * (GPIO_0_PIN & (uint8_t)0x03))))
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#define GPIO_0_IRQ EXTI0_IRQn
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/* GPIO channel 1 config */
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#define GPIO_1_PORT GPIOA
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#define GPIO_1_PIN 1
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#define GPIO_1_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN)
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#define GPIO_1_EXTI_CFG() (AFIO->EXTICR[GPIO_1_PIN>>0x02] |= (((uint32_t)0x00) << (0x04 * (GPIO_1_PIN & (uint8_t)0x03))))
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#define GPIO_1_IRQ EXTI0_IRQn
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/* GPIO channel 2 config */
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#define GPIO_2_PORT GPIOF
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#define GPIO_2_PIN 4
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#define GPIO_2_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPFEN)
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#define GPIO_2_EXTI_CFG() (AFIO->EXTICR[GPIO_2_PIN>>0x02] |= (((uint32_t)0x05) << (0x04 * (GPIO_2_PIN & (uint8_t)0x03))))
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#define GPIO_2_IRQ EXTI4_IRQn
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/* GPIO channel 3 config */
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#define GPIO_3_PORT GPIOF
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#define GPIO_3_PIN 5
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#define GPIO_3_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPFEN)
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#define GPIO_3_EXTI_CFG() (AFIO->EXTICR[GPIO_3_PIN>>0x02] |= (((uint32_t)0x05) << (0x04 * (GPIO_3_PIN & (uint8_t)0x03))))
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#define GPIO_3_IRQ EXTI4_IRQn
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/* GPIO channel 4 config */
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#define GPIO_4_PORT GPIOF
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#define GPIO_4_PIN 6
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#define GPIO_4_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPFEN)
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#define GPIO_4_EXTI_CFG() (AFIO->EXTICR[GPIO_3_PIN>>0x02] |= (((uint32_t)0x05) << (0x04 * (GPIO_3_PIN & (uint8_t)0x03))))
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#define GPIO_4_IRQ EXTI4_IRQn
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/* GPIO channel 5 config */
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#define GPIO_5_PORT GPIOF
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#define GPIO_5_PIN 7
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#define GPIO_5_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPFEN)
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#define GPIO_5_EXTI_CFG() (AFIO->EXTICR[GPIO_5_PIN>>0x02] |= (((uint32_t)0x05) << (0x04 * (GPIO_5_PIN & (uint8_t)0x03))))
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#define GPIO_5_IRQ EXTI4_IRQn
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/* GPIO channel 6 config */
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#define GPIO_6_PORT GPIOC
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#define GPIO_6_PIN 4
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#define GPIO_6_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
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#define GPIO_6_EXTI_CFG() (AFIO->EXTICR[GPIO_6_PIN>>0x02] |= (((uint32_t)0x02) << (0x04 * (GPIO_6_PIN & (uint8_t)0x03))))
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#define GPIO_6_IRQ EXTI3_IRQn
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/* GPIO channel 7 config */
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#define GPIO_7_PORT GPIOC
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#define GPIO_7_PIN 11
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#define GPIO_7_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
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#define GPIO_7_EXTI_CFG() (AFIO->EXTICR[GPIO_7_PIN>>0x02] |= (((uint32_t)0x02) << (0x04 * (GPIO_7_PIN & (uint8_t)0x03))))
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#define GPIO_7_IRQ EXTI3_IRQn
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/* GPIO channel 8 config */
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#define GPIO_8_PORT GPIOC
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#define GPIO_8_PIN 12
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#define GPIO_8_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
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#define GPIO_8_EXTI_CFG() (AFIO->EXTICR[GPIO_8_PIN>>0x02] |= (((uint32_t)0x02) << (0x04 * (GPIO_8_PIN & (uint8_t)0x03))))
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#define GPIO_8_IRQ EXTI3_IRQn
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/* GPIO channel 9 config */
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#define GPIO_9_PORT GPIOC
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#define GPIO_9_PIN 13
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#define GPIO_9_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
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#define GPIO_9_EXTI_CFG() (AFIO->EXTICR[GPIO_9_PIN>>0x02] |= (((uint32_t)0x02) << (0x04 * (GPIO_9_PIN & (uint8_t)0x03))))
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#define GPIO_9_IRQ EXTI3_IRQn
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/* GPIO channel 10 config */
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#define GPIO_10_PORT GPIOC
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#define GPIO_10_PIN 14
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#define GPIO_10_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
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#define GPIO_10_EXTI_CFG() (AFIO->EXTICR[GPIO_10_PIN>>0x02] |= (((uint32_t)0x02) << (0x04 * (GPIO_10_PIN & (uint8_t)0x03))))
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#define GPIO_10_IRQ EXTI3_IRQn
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/* GPIO channel 11 config */
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#define GPIO_11_PORT GPIOC
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#define GPIO_11_PIN 15
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#define GPIO_11_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN)
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#define GPIO_11_EXTI_CFG() (AFIO->EXTICR[GPIO_11_PIN>>0x02] |= (((uint32_t)0x02) << (0x04 * (GPIO_11_PIN & (uint8_t)0x03))))
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#define GPIO_11_IRQ EXTI3_IRQn
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/**
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* @brief SPI configuration
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*/
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#define SPI_NUM_OF 1
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#define SPI_0_EN 1
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#define SPI_IRQ_0 SPI_0
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#define SPI_0_BR_PRESC 16
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#define SPI_0_SCLK GPIO_5_PIN
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#define SPI_0_MISO GPIO_6_PIN
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#define SPI_0_MOSI GPIO_7_PIN
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#define SPI_0_CS GPIO_4_PIN
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#endif /* __PERIPH_CONF_H */
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/** @} */
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