RIOT/cpu/cc26x2_cc13x2/Makefile.include

CPU_VARIANT = x2

VECTORS_O = $(BINDIR)/cc26xx_cc13xx/vectors.o

ROM_START_ADDR ?= 0x00000000
RAM_START_ADDR ?= 0x20000000
ROM_LEN ?= 352K
RAM_LEN ?= 80K

LINKER_SCRIPT ?= cortexm.ld

include ${RIOTCPU}/cc26xx_cc13xx/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk
cpu/cc13x2: Add support for cc13x2 MCUs Signed-off-by: Anton Gerasimov <tossel@gmail.com> 2018-06-10 23:29:03 +02:00			`CPU_VARIANT = x2`

			`VECTORS_O = $(BINDIR)/cc26xx_cc13xx/vectors.o`

cpu/cc26xx_cc13xx: switch to cortexm.ld linker script Signed-off-by: Anton Gerasimov <tossel@gmail.com> 2019-10-29 21:25:32 +01:00			`ROM_START_ADDR ?= 0x00000000`
			`RAM_START_ADDR ?= 0x20000000`
			`ROM_LEN ?= 352K`
cc26x2_cc13x2: use correct RAM value Previous value was 20 K, now it's 80 K. The older family of these MCUs (cc13x0, cc26x0) had that size, currently for cc13x2 and cc26x2 it's 80 K. Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com> 2020-02-10 20:24:43 +01:00			`RAM_LEN ?= 80K`
cpu/cc26xx_cc13xx: switch to cortexm.ld linker script Signed-off-by: Anton Gerasimov <tossel@gmail.com> 2019-10-29 21:25:32 +01:00
			`LINKER_SCRIPT ?= cortexm.ld`

cpu/cc13x2: Add support for cc13x2 MCUs Signed-off-by: Anton Gerasimov <tossel@gmail.com> 2018-06-10 23:29:03 +02:00			`include ${RIOTCPU}/cc26xx_cc13xx/Makefile.include`
			`include $(RIOTMAKE)/arch/cortexm.inc.mk`