2014-04-17 19:41:48 +02:00
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_stm32f0
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* @{
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*
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* @file
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* @brief CPU specific hwtimer configuration options
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*
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* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
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*/
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#ifndef __HWTIMER_CPU_H
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#define __HWTIMER_CPU_H
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2014-10-13 10:53:20 +02:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2014-04-17 19:41:48 +02:00
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/**
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* @name Hardware timer configuration
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* @{
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*/
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2014-11-26 18:40:17 +01:00
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#define HWTIMER_MAXTIMERS (4U) /**< the CPU implementation supports 4 HW timers */
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#define HWTIMER_SPEED (1000000U) /**< the HW timer runs with 1MHz */
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#define HWTIMER_MAXTICKS (0xFFFFFFFF) /**< 32-bit timer */
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#define HWTIMER_SPIN_BARRIER (18U) /**< set spin barrier to at least 18 ticks */
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2014-04-17 19:41:48 +02:00
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/** @} */
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2014-10-13 10:53:20 +02:00
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#ifdef __cplusplus
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}
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#endif
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2014-04-17 19:41:48 +02:00
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#endif /* __HWTIMER_CPU_H */
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/** @} */
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