2017-03-29 14:09:54 +02:00
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/*
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* Copyright (C) 2017 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @addtogroup cpu_stm32l4
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* @{
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*
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* @file
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* @brief Memory definitions for the STM32L476RG
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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MEMORY
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{
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rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
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2017-04-14 14:48:25 +02:00
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cpuid (r) : ORIGIN = 0x1fff7590, LENGTH = 12
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2017-03-29 14:09:54 +02:00
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}
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_cpuid_address = ORIGIN(cpuid);
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INCLUDE cortexm_base.ld
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