2014-05-14 09:55:16 +02:00
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/*
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* Copyright (C) 2014 Freie Universität Berlin.
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*
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2014-07-31 19:45:27 +02:00
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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2014-05-14 09:55:16 +02:00
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*/
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2011-10-05 15:38:16 +02:00
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#include "control_2xxx.h"
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#include <stdio.h>
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#include <time.h>
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#include <unistd.h>
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#include "serial.h"
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void hard_reset_to_bootloader(void)
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{
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2013-06-21 04:00:45 +02:00
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printf("Reset CPU (into bootloader)\r\n");
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2014-07-31 20:48:19 +02:00
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set_rts(1); /* RTS (ttl level) connects to P0.14 */
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set_dtr(1); /* DTR (ttl level) connects to RST */
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send_break_signal(); /* or break detect circuit to RST */
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2013-06-21 04:00:45 +02:00
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usleep(75000);
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2014-07-31 20:48:19 +02:00
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set_dtr(0); /* allow the CPU to run */
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2013-06-21 04:00:45 +02:00
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set_baud(baud_rate);
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2014-07-31 20:48:19 +02:00
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set_rts(1); /* set RTS again (as it has been reset by set_baudrate) */
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2013-06-21 04:00:45 +02:00
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usleep(40000);
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2011-10-05 15:38:16 +02:00
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}
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void hard_reset_to_user_code(void)
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{
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2013-06-21 04:00:45 +02:00
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printf("Reset CPU (into user code)\r\n");
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2014-07-31 20:48:19 +02:00
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set_rts(0); /* RTS (ttl level) connects to P0.14 */
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set_dtr(1); /* DTR (ttl level) connects to RST */
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send_break_signal(); /* or break detect circuit to RST */
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2013-06-21 04:00:45 +02:00
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usleep(75000);
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2014-07-31 20:48:19 +02:00
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set_dtr(0); /* allow the CPU to run */
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2013-06-21 04:00:45 +02:00
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usleep(40000);
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2011-10-05 15:38:16 +02:00
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}
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