2016-06-29 16:30:13 +02:00
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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* Copyright (C) 2015 Zolertia SL
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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2017-11-30 23:37:13 +01:00
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* @ingroup boards_common_remote
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2016-06-29 16:30:13 +02:00
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the Re-Mote boards
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* Antonio Lignan <alinan@zolertia.com>
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*/
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2017-01-18 13:00:05 +01:00
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#ifndef PERIPH_COMMON_H
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#define PERIPH_COMMON_H
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2016-06-29 16:30:13 +02:00
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock system configuration
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* @{
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*/
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#define CLOCK_CORECLOCK (32000000U) /* 32MHz */
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/** @} */
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/**
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* @name Timer configuration
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2017-07-13 23:32:45 +02:00
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*
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* General purpose timers (GPT[0-3]) are configured consecutively and in order
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* (without gaps) starting from GPT0, i.e. if multiple timers are enabled.
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*
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2016-06-29 16:30:13 +02:00
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* @{
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*/
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2016-08-16 21:07:26 +02:00
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static const timer_conf_t timer_config[] = {
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{
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2017-07-13 23:32:45 +02:00
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.chn = 2,
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.cfg = GPTMCFG_16_BIT_TIMER, /* required for XTIMER */
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2016-08-16 21:07:26 +02:00
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},
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{
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2017-07-13 23:32:45 +02:00
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.chn = 1,
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.cfg = GPTMCFG_32_BIT_TIMER,
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2016-08-16 21:07:26 +02:00
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},
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{
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2017-07-13 23:32:45 +02:00
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.chn = 2,
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.cfg = GPTMCFG_16_BIT_TIMER,
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2016-08-16 21:07:26 +02:00
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},
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{
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2017-07-13 23:32:45 +02:00
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.chn = 1,
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.cfg = GPTMCFG_32_BIT_TIMER,
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2016-08-16 21:07:26 +02:00
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},
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};
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2016-06-29 16:30:13 +02:00
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2019-07-18 15:14:29 +02:00
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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2016-06-29 16:30:13 +02:00
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2016-08-16 21:07:26 +02:00
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#define TIMER_IRQ_PRIO 1
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2016-06-29 16:30:13 +02:00
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/** @} */
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2016-07-08 04:32:48 +02:00
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/**
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* @name Radio peripheral configuration
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* @{
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*/
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#define RADIO_IRQ_PRIO 1
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/** @} */
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2017-07-04 11:42:35 +02:00
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/**
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* @name UART configuration
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* @{
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*/
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2018-01-15 14:39:29 +01:00
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static const uart_conf_t uart_config[] = {
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2018-03-02 09:08:28 +01:00
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/* UART0 is mapped to debug usb */
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2018-01-15 14:39:29 +01:00
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{
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.dev = UART0_BASEADDR,
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2018-03-02 09:08:28 +01:00
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.rx_pin = GPIO_PIN(PORT_A, 0),
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.tx_pin = GPIO_PIN(PORT_A, 1),
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2018-01-15 14:39:29 +01:00
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.cts_pin = GPIO_UNDEF,
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.rts_pin = GPIO_UNDEF
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2018-03-02 09:02:53 +01:00
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},
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{
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.dev = UART1_BASEADDR,
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2018-03-02 09:08:28 +01:00
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.rx_pin = GPIO_PIN(PORT_C, 1),
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.tx_pin = GPIO_PIN(PORT_C, 0),
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2018-03-02 09:02:53 +01:00
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.cts_pin = GPIO_UNDEF,
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.rts_pin = GPIO_UNDEF
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2018-01-15 14:39:29 +01:00
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}
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};
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2017-07-04 11:42:35 +02:00
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2018-01-15 14:39:29 +01:00
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/* interrupt function name mapping */
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2017-07-04 11:42:35 +02:00
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#define UART_0_ISR isr_uart0
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2018-03-02 09:02:53 +01:00
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#define UART_1_ISR isr_uart1
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2018-01-15 14:39:29 +01:00
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/* macros common across all UARTs */
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2019-07-18 15:14:29 +02:00
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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2018-01-15 14:39:29 +01:00
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2017-07-04 11:42:35 +02:00
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/** @} */
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2016-06-29 16:30:13 +02:00
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#ifdef __cplusplus
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} /* end extern "C" */
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#endif
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2017-01-18 13:00:05 +01:00
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#endif /* PERIPH_COMMON_H */
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2016-06-29 16:30:13 +02:00
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/** @} */
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