RIOT/cpu/stm32/Makefile.features

include $(RIOTCPU)/stm32/stm32_info.mk

FEATURES_PROVIDED += bootloader_stm32
FEATURES_PROVIDED += cpu_stm32$(CPU_FAM)
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_gpio periph_gpio_irq
FEATURES_PROVIDED += puf_sram
FEATURES_PROVIDED += periph_uart_modecfg
FEATURES_PROVIDED += periph_uart_nonblocking
FEATURES_PROVIDED += periph_wdt

ifneq (,$(filter $(CPU_FAM),f0 f1 f3 g0 g4 l0 l1 l4 wb))
  FEATURES_PROVIDED += periph_flashpage
  FEATURES_PROVIDED += periph_flashpage_raw
endif

ifneq (,$(filter $(CPU_FAM),l0 l1))
  FEATURES_PROVIDED += periph_eeprom
endif

ifeq (f1,$(CPU_FAM))
  FEATURES_CONFLICT += periph_rtc:periph_rtt
  FEATURES_CONFLICT_MSG += "On the STM32F1, the RTC and RTT map to the same hardware peripheral."
endif

# Not all F4 and L0 parts implement a RNG.
CPU_MODELS_WITHOUT_HWRNG = stm32f401% stm32f411% stm32f446% stm32l031%
ifneq (,$(filter $(CPU_FAM),f2 f4 f7 g4 l0 l4 wb))
  ifeq (,$(filter $(CPU_MODELS_WITHOUT_HWRNG),$(CPU_MODEL)))
    FEATURES_PROVIDED += periph_hwrng
  endif
endif

ifneq (,$(filter $(CPU_FAM),f2 f4 f7 g0 g4 l1 l4))
  FEATURES_PROVIDED += cortexm_mpu
endif

# only some stm32f3 and stm32l0 have an MPU
STM32_WITH_MPU += stm32f303re stm32f303vc stm32f303ze stm32l052t8
ifneq (,$(filter $(CPU_MODEL),$(STM32_WITH_MPU)))
  FEATURES_PROVIDED += cortexm_mpu
endif

include $(RIOTCPU)/cortexm_common/Makefile.features
cpu/stm32: introduce unique directory for stm32 cpus 2020-05-03 14:35:01 +02:00			`include $(RIOTCPU)/stm32/stm32_info.mk`

cpu/stm32: implement reset to bootloader The STM32 line of microcontrollers comes with a bootloader in the ROM. It provides the option to flash the device firmware in DFU mode (USB) or via UART or SPI. To enter the bootloader we have to jump to a specific address in memory, but before reset the CPU to make sure the system is in a known state. This enables us to use the usb_board_reset module on all STM32 platforms. 2020-05-22 21:35:53 +02:00			`FEATURES_PROVIDED += bootloader_stm32`
cpu/stm32: fix issue with cpu feature name 2020-05-30 18:59:01 +02:00			`FEATURES_PROVIDED += cpu_stm32$(CPU_FAM)`
cpu/stm32: introduce unique directory for stm32 cpus 2020-05-03 14:35:01 +02:00			`FEATURES_PROVIDED += periph_cpuid`
			`FEATURES_PROVIDED += periph_gpio periph_gpio_irq`
			`FEATURES_PROVIDED += puf_sram`
			`FEATURES_PROVIDED += periph_uart_modecfg`
cpu/stm32: add non blocking uart Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com> 2020-06-10 15:44:58 +02:00			`FEATURES_PROVIDED += periph_uart_nonblocking`
cpu/stm32: introduce unique directory for stm32 cpus 2020-05-03 14:35:01 +02:00			`FEATURES_PROVIDED += periph_wdt`

cpu/stm32: add stm32g0 support 2020-05-03 22:22:10 +02:00			`ifneq (,$(filter $(CPU_FAM),f0 f1 f3 g0 g4 l0 l1 l4 wb))`
cpu/stm32: enable flashpage feature for stm32f031k6 2020-07-15 11:51:44 +02:00			`FEATURES_PROVIDED += periph_flashpage`
			`FEATURES_PROVIDED += periph_flashpage_raw`
cpu/stm32: introduce unique directory for stm32 cpus 2020-05-03 14:35:01 +02:00			`endif`

cpu/stm32: introduce CPU_FAM_SHORT variable This variable contains the short cpu family name: f1, f2, etc. 2020-05-26 11:12:06 +02:00			`ifneq (,$(filter $(CPU_FAM),l0 l1))`
cpu/stm32: introduce unique directory for stm32 cpus 2020-05-03 14:35:01 +02:00			`FEATURES_PROVIDED += periph_eeprom`
			`endif`

cpu/stm32: fix remaining occurence of stm32f1 cpu family 2020-05-30 18:59:36 +02:00			`ifeq (f1,$(CPU_FAM))`
cpu/stm32: introduce unique directory for stm32 cpus 2020-05-03 14:35:01 +02:00			`FEATURES_CONFLICT += periph_rtc:periph_rtt`
			`FEATURES_CONFLICT_MSG += "On the STM32F1, the RTC and RTT map to the same hardware peripheral."`
			`endif`

cpu/stm32: filter availability of RNG by CPU not by board. The old limitation is not valid anymore, we can evaluate $(CPU_MODEL) here directly. The output of make -C tests/periph_hwrng info-boards-supported \| wc -w remains the same. 2020-05-29 17:37:05 +02:00			`# Not all F4 and L0 parts implement a RNG.`
cpu/stm32/Makefile.features: capture whole family All members of the stm32f401* family (etc) don't have the HWRNG peripheral. Apply a broader wildcard so we don't have to touch this file when adding new boards with slightly different MCUs. 2020-06-01 16:23:16 +02:00			`CPU_MODELS_WITHOUT_HWRNG = stm32f401% stm32f411% stm32f446% stm32l031%`
cpu/stm32: add support for stm32g4 2020-05-23 17:26:54 +02:00			`ifneq (,$(filter $(CPU_FAM),f2 f4 f7 g4 l0 l4 wb))`
cpu/stm32: filter availability of RNG by CPU not by board. The old limitation is not valid anymore, we can evaluate $(CPU_MODEL) here directly. The output of make -C tests/periph_hwrng info-boards-supported \| wc -w remains the same. 2020-05-29 17:37:05 +02:00			`ifeq (,$(filter $(CPU_MODELS_WITHOUT_HWRNG),$(CPU_MODEL)))`
			`FEATURES_PROVIDED += periph_hwrng`
			`endif`
cpu/stm32: introduce unique directory for stm32 cpus 2020-05-03 14:35:01 +02:00			`endif`

cpu/stm32: add stm32g0 support 2020-05-03 22:22:10 +02:00			`ifneq (,$(filter $(CPU_FAM),f2 f4 f7 g0 g4 l1 l4))`
cpu/stm32: introduce unique directory for stm32 cpus 2020-05-03 14:35:01 +02:00			`FEATURES_PROVIDED += cortexm_mpu`
			`endif`

			`# only some stm32f3 and stm32l0 have an MPU`
			`STM32_WITH_MPU += stm32f303re stm32f303vc stm32f303ze stm32l052t8`
			`ifneq (,$(filter $(CPU_MODEL),$(STM32_WITH_MPU)))`
			`FEATURES_PROVIDED += cortexm_mpu`
			`endif`

			`include $(RIOTCPU)/cortexm_common/Makefile.features`