RIOT/cpu/cc26x0/Makefile.features

FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_uart
FEATURES_PROVIDED += periph_uart_modecfg

-include $(RIOTCPU)/cortexm_common/Makefile.features
cpu: cc26x0: reorganize Makefile.features 2017-10-28 17:52:52 +02:00			`FEATURES_PROVIDED += periph_cpuid`
cpu/cc26x0: Implement uart_mode() This change required correcting the values for LCRH_PEN and LRCH_EPS values defined in cc26x0_uart.h, as they were incorrect according to 19.8.1.7 of the TI CC26x0 reference manual. on-behalf-of: @sparkmeter <ben.postman@sparkmeter.io> 2019-05-29 01:10:38 +02:00			`FEATURES_PROVIDED += periph_uart`
			`FEATURES_PROVIDED += periph_uart_modecfg`
cpu: cc26x0: reorganize Makefile.features 2017-10-28 17:52:52 +02:00
			`-include $(RIOTCPU)/cortexm_common/Makefile.features`